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Power amplifier reducing gain mismatch

A technology of power amplifiers and amplifiers, which is applied in the direction of power amplifiers, amplifiers, high-frequency amplifiers, etc., and can solve problems such as signal distortion, gain differences between NMOS amplifiers and PMOS amplifiers, etc.

Inactive Publication Date: 2012-01-11
SAMSUNG ELECTRO MECHANICS CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, due to the difference in characteristics between N MOS amplifiers and P MOS amplifiers, a difference in gain between N MOS amplifiers and P MOS amplifiers may occur
For this reason, signal distortion may occur when the respective output signals of the N MOS amplifier and the P MOS amplifier are coupled

Method used

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  • Power amplifier reducing gain mismatch
  • Power amplifier reducing gain mismatch
  • Power amplifier reducing gain mismatch

Examples

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Embodiment Construction

[0031] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings.

[0032] figure 1 A schematic diagram showing the configuration of a power amplifier according to an exemplary embodiment of the present invention.

[0033] refer to figure 1 , The power amplifier according to this embodiment may include a first amplifying part 110 , a first matching part 120 , a second amplifying part 130 and a power coupling part 140 .

[0034] The first amplification part 110 may include at least one amplification unit. The at least one amplifying unit may include a first NMOS (Metal Oxide Semiconductor) amplifier M1 and a first P MOS amplifier M2 stacked between the driving power terminal VDD and the ground terminal, wherein the driving power terminal VDD provides a predetermined voltage level drive power.

[0035] That is, the first N MOS amplifier M1 may have a source electrically connected to the driving power t...

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Abstract

There is provided a power amplifier reducing a gain mismatch in order to reduce a gain mismatch between an N MOS amplifier and a P MOS amplifier by cross-connecting outputs from a two-stage amplification unit in a power amplifier having amplification units with a stacked structure in which the N MOS amplifier and the P MOS amplifier are connected in series with each other.

Description

[0001] cross reference [0002] This application claims priority from Korean Patent Application No. 10-2010-0064976 filed on Jul. 6, 2010, the disclosure of which is hereby incorporated by reference. technical field [0003] The present invention relates to a power amplifier, and more particularly, to a power amplifier in which the N MOS amplifier and the P MOS amplifier are reduced by cross-connecting the outputs of two-stage amplifying units in a power amplifier having a stacked structure of amplifying units. Gain mismatch between amplifiers, wherein, in the stack structure, an N MOS amplifier and a P MOS amplifier are connected in series with each other. Background technique [0004] Typically, power amplifiers, being large signal circuits, fail as the signal amplitude increases. [0005] To prevent this, the voltage swing between the gate and drain of the active device and the voltage swing between the drain and source of the active device are limited. This limitation...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03F3/21H03F1/32
CPCH03F2200/405H03F3/211H03F2203/45644H03F3/45179H03F2200/387H03F3/189H03F1/56H03F3/193H03F2200/222H03F2200/204H03F3/245H03F2203/45562
Inventor 孙基龙具本勋洪圣喆金奎锡罗裕森
Owner SAMSUNG ELECTRO MECHANICS CO LTD