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Link rapidly recovering method and device

A fast recovery and link technology, applied in the field of network communication, it can solve the problem that the time difference between becoming available is not easy to determine, and the fast recovery link cannot be guaranteed.

Active Publication Date: 2012-02-08
NEW H3C TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in practical applications, there are various differences between the ports at both ends of the link, and the time difference between the lo

Method used

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  • Link rapidly recovering method and device
  • Link rapidly recovering method and device
  • Link rapidly recovering method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] Because in the prior art, when the port of the link is physically UP, the port will immediately report to the upper-layer protocol module to trigger the upper-layer protocol module to switch the logical state of the port to logical UP, and in this embodiment 1, by controlling Among the ports at both ends of the link, the first physical UP port triggers the logical UP delay, that is, the first physical UP port waits for the second physical UP port, so that the time difference between the two ports triggering the logical UP can be shortened to achieve fast link recovery. purpose of the road. When this embodiment 1 is specifically implemented, it may include figure 2 The flow shown:

[0053] see figure 2 , figure 2 The flow chart provided for Embodiment 1 of the present invention. Such as figure 2 As shown, the process may include the following steps:

[0054] In step 201, a port of a link (referred to as port A) starts its corresponding logical state switching t...

Embodiment 2

[0090] When this embodiment 2 is specifically implemented, it may include Figure 8 The flow shown:

[0091] see Figure 8 , Figure 8 The flow chart provided for Embodiment 2 of the present invention. Such as Figure 8 As shown, the process may include the following steps:

[0092] Step 801, after a port (referred to as port A) of the link switches its physical state to physical UP, it sends a message to the opposite port (that is, the port of the opposite device connected to the link, denoted as port B). A notification message (info message for short) that triggers a logical state switching, and starts its own corresponding logical state switching timer (LINK UP timer for short).

[0093] In this embodiment, the LINK UP timer corresponding to port A may be set in port A, or may be independent of port A, which is not specifically limited in the present invention.

[0094] In step 802, port A detects whether it has received an acknowledgment message (referred to as ack m...

Embodiment 1

[0129] Compared with Embodiment 1, no matter what the scenario is in Embodiment 2, the logical UP time difference between the ports at both ends of the link can be shortened to no more than a message transmission time (ΔT logic tx ), therefore, this embodiment 2 has no special requirements on the cycle t started by the LINK UP timer, and is not subject to ΔT phy , ΔT tx The optimization effect is relatively stable and has a certain degree of promotion. Preferably, considering the actual situation, the processing capability of the CPU may be considered when setting t, usually not lower than 100ms.

[0130] So far, the description of the second embodiment is completed.

[0131] The method provided by the present invention has been described above, and the port module provided by the present invention is described below:

[0132] see Figure 13 , Figure 13 The device structure diagram provided for the embodiment of the present invention. The device is applied to the port i...

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Abstract

The invention provides a link rapidly recovering method and device. The method comprises the following steps of: A, after ensuring that each port of a link is usable in a physical state, starting a logic state conversion timer at a port of the end, and sending an informing message for triggering logic state conversion to the port of the opposite end; B, detecting whether the port of the end receives a verifying message about the informing message, send by the port of the opposite end, if so, executing a step E, and otherwise, executing a step C; C, detecting whether the port of the end receives the verifying message for triggering logic state conversion, send by the port of the opposite end, if so, sending the verifying message about the informing message to the port of the opposite end and executing the step E, and otherwise, executing a step D; D, checking whether the logic state conversion timer at the port of the end is timeout, if so, sending the informing message for triggering logic state conversion to the port of the opposite end again, restarting the logic state conversion timer and returning to the step B, and otherwise, returning to the step B; and E, closing the logic state conversion timer at the port of the end, triggering an upper layer to convert the logic state of the port of the end to a usable logic state.

Description

technical field [0001] The invention relates to network communication technology, in particular to a method and device for quickly restoring a link. Background technique [0002] An Ethernet port has two physical connection states: available (available) and unavailable (DOWN). When an Ethernet physical link (hereinafter referred to as link) is restored to connectivity, the physical states of the ports at both ends of the link need to be available through physical layer negotiation. [0003] However, link recovery depends not only on the availability of the physical status of the ports at both ends of the link, but also on the availability of the logical status of the ports at both ends of the link, such as the STP status of the port and the aggregation member status. Wherein, when the physical state of the port becomes available, it will immediately report LINK UP to the upper layer protocol module, so as to trigger the upper layer protocol module to switch the logical stat...

Claims

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Application Information

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IPC IPC(8): H04L12/24
Inventor 张楠祁正林刘刀桂文闻
Owner NEW H3C TECH CO LTD
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