Method for producing a hts coated conductor and hts coated conductor with reduced losses
A technology of superconductors and conductors, which is applied in the manufacture/processing of superconductor devices, superconducting devices, electrical components, etc., and can solve the problems of difficult surface morphology of the buffer layer and limiting the positive effect of the pinning center.
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[0057] figure 1 A schematic cross-sectional view of an HTS-coated conductor 12 of the present invention is shown. It should be noted that all figures are not to scale and particularly show details exaggerated in directions perpendicular to the plane of the substrate.
[0058] The HTS-coated conductor 12 comprises a substantially flat substrate 1, such as a steel strip. On the substrate 1, a substantially planar buffer layer 2, eg CeO, is deposited. This buffer layer 2 generally has a thickness between 300 nm and 1000 nm. Here by locally removing the buffer layer material, the surface 13 of the buffer layer 2 is roughened, resulting in the formation of trench-type roughening structures 7 where the thickness of the buffer layer 2 (perpendicular to the substrate plane) is reduced. Between the roughening structures 7 there are unmachined flat surface regions 6 . In the embodiment shown, this roughening structure 7 is periodic along the substrate plane (note that periodicity is...
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