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small block communication operator

An operator and computing space technology, applied in the computer field, can solve problems that are prone to errors and difficult to implement

Active Publication Date: 2015-11-25
MICROSOFT TECH LICENSING LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

As a result, the process of creating indexes and geometries can be error-prone and difficult to implement

Method used

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Embodiment Construction

[0013] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of example specific embodiments in which the invention may be practiced. In this regard, directional terms such as "top", "bottom", "front", "rear", "leading", "trailing", etc. are used with reference to the orientation of the Figure being described. Because various components of an embodiment may be positioned in a number of different orientations, directional terms are used for purposes of illustration and not limitation. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. Accordingly, the following detailed description is not intended to be limiting, and the scope of the invention is defined by the appended claims. It should be understood that the features of the various exemplary embodiments described herein can...

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Abstract

A high level programming language provides a tile communication operator that decomposes a computational space into sub-spaces (i.e., tiles) that may be mapped to execution structures (e.g., thread groups) of data parallel compute nodes. An indexable type with a rank and element type defines the computational space. For an input indexable type, the tile communication operator produces an output indexable type with the same rank as the input indexable type and an element type that is a tile of the input indexable type. The output indexable type provides a local view structure of the computational space that enables coalescing of global memory accesses in a data parallel compute node.

Description

technical field [0001] The present invention relates to computer technology, in particular to small block communication operators. Background technique [0002] A computer system typically includes one or more general-purpose processors (e.g., a central processing unit (CPU)) and one or more dedicated data-parallel computing nodes (e.g., a graphics processing unit (GPU) or a single-instruction multiple-data (SIMD) ) execution unit). A general-purpose processor typically performs general-purpose processing on a computer system, and a data-parallel compute node typically performs data-parallel processing (eg, graphics processing) on ​​a computer system. General-purpose processors often have the capability to implement data-parallel algorithms, but do so without the optimized hardware resources found in data-parallel compute nodes. As a result, general-purpose processors can be much less efficient at executing data-parallel algorithms than data-parallel compute nodes. [000...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
CPCG06F8/453G06F8/314G06F9/06G06F9/30G06F9/38
Inventor P·F·林塞斯
Owner MICROSOFT TECH LICENSING LLC
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