Array substrate, method for manufacturing same and display device comprising same

A technology of an array substrate and a manufacturing method, applied in the display field, can solve the problems of affecting normal use, light leakage, low panel contrast, etc., and achieve the effects of improving product quality, reducing manufacturing cost, and ensuring moderate deflection

Active Publication Date: 2014-07-09
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the current pixel structure, the thickness of the TFT area is different ( figure 1 The middle passivation layer 9 has obvious protrusions at the TFT) which affects the uniformity of liquid crystal molecule filling behind the cell, and the liquid crystal molecules are irregularly arranged in the reflection area; and because the pixel electrode inside the pixel structure is closer to the data line, Affected by the voltage of the data line, there is a step difference between the layers in the pixel area. This structure is not conducive to the horizontal driving of the ADS mode, and it is very easy to cause light leakage due to the insufficient deflection angle of the liquid crystal molecules due to abnormal liquid crystal driving (Disclination). , due to light leakage, the light emitted by the backlight cannot be fully utilized in the display area, resulting in low contrast of the panel and affecting normal use

Method used

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  • Array substrate, method for manufacturing same and display device comprising same
  • Array substrate, method for manufacturing same and display device comprising same
  • Array substrate, method for manufacturing same and display device comprising same

Examples

Experimental program
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Embodiment 1

[0030] This embodiment specifically provides an array substrate, which can be applied in the ADS driving mode, such as figure 2 As shown, it includes a gate line and a data line that define a pixel area, the pixel area includes a thin film transistor area and a pixel electrode pattern area, and a gate 2, a gate insulating layer 3, an active layer are formed in the thin film transistor area 4. The source electrode 5, the drain electrode 6 and the passivation layer 9; the gate insulating layer 3, the pixel electrode 7, the passivation layer 9 and the common electrode 8 are formed in the pattern area of ​​the pixel electrode, wherein the common electrode The electrode 8 and the pixel electrode 7 constitute a multidimensional electric field; the protective layer 12 can be optionally covered above the gate insulating layer 3 and the source / drain, and then a black matrix layer 10 is formed on the source / drain and the TFT channel, or The black matrix layer 10 is formed directly abov...

Embodiment 2

[0053] This embodiment provides another array substrate. Since the above-mentioned Embodiment 1 has been described in detail, some repetitive content will be omitted in this embodiment, and only the differences will be described in detail here.

[0054] The array substrate provided by this embodiment can be applied in the ADS driving mode, such as Figure 4 As shown, it includes a gate line and a data line that define a pixel area, the pixel area includes a thin film transistor area and a pixel electrode pattern area, and a gate 2, a gate insulating layer 3, an active layer are formed in the thin film transistor area 4. The source electrode 5, the drain electrode 6 and the passivation layer 9; the gate insulating layer 3, the pixel electrode 7, the passivation layer 9 and the common electrode 8 are formed in the pattern area of ​​the pixel electrode, wherein the common electrode The electrode 8 and the pixel electrode 7 form a multi-dimensional electric field.

[0055] Wherei...

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Abstract

The invention relates to an array substrate, a manufacturing method thereof, and a display device including the array substrate, and belongs to the field of display technology. In order to overcome the problem of too low contrast of the current liquid crystal panel, the present invention provides an array substrate, including gate lines and data lines defining a pixel area, the pixel area includes a thin film transistor area and a pixel electrode pattern area, and the thin film transistor area is formed with a gate, A gate insulating layer, an active layer, a source electrode, a drain electrode, and a passivation layer; a gate insulating layer, a pixel electrode, a passivation layer, and a common electrode are formed in the pixel electrode pattern area, and the common electrode and the pixel electrode constitute a multidimensional electric field; wherein, A color resin layer is formed between the gate insulating layer and the pixel electrode. The technical proposal forms a colored resin layer above the gate insulating layer of the thin film transistor, which is beneficial to flatten the structure inside the pixel area, prevents irregular arrangement of liquid crystals in the reflective area, prevents light leakage and improves contrast.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device including the array substrate. Background technique [0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD for short) has the characteristics of small size, low power consumption, and no radiation, and occupies a dominant position in the flat panel display market. With the advancement of technology, consumers have put forward higher requirements for the display effect of mobile products, and the display effect of ordinary TN (Twisted Nematic, twisted nematic) liquid crystal display can no longer meet the market demand. At present, major manufacturers are gradually applying various wide viewing angle technologies with better display effects to mobile products, such as IPS (In-Plane Switching, coplanar switching), VA (Vertical Alignment, vertical alignment), AD-SDS (Advanced-Super Dimensional ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G02F1/1362G02F1/1368G02F1/1343H01L27/12H01L21/77
CPCG02F2001/136222H01L27/1259G02F2001/134318G02F1/1362G02F1/1343G02F2001/134372H01L27/124G02F1/136209G02F2203/01G02F2203/02G02F1/134318G02F1/134372G02F1/136222G02F1/1368
Inventor 宋泳锡惠官宝刘圣烈崔承镇张锋
Owner BOE TECH GRP CO LTD
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