Data storage system with multi-bit storage device and on-chip buffer programming method

Abstract

An on-chip buffer programming method for a data storage device including a multi-bit memory device and a memory controller is disclosed. The on-chip buffer programming method includes: measuring the performance of the data storage device; judging whether the measured performance meets the target performance of the data storage device; and selecting one of multiple scheduling modes as the on-chip buffer programming scheduling mode of the data storage device according to the judgment result .

Description

technical field [0001] Exemplary embodiments relate to a storage device, and more particularly, to a data storage system. Background technique [0002] Semiconductor memory devices are critical microelectronic components found in digital logic systems such as computers and microprocessor-based applications ranging from satellites to consumer electronics. Thus, advances in the fabrication of semiconductor memory devices—including process improvements and related developments in circuit design that allow scaling to higher storage densities and faster operating speeds—have helped to establish (families) performance standards. [0003] Semiconductor storage devices generally include volatile storage devices such as random access memory (RAM) devices and nonvolatile storage devices. In a RAM device, either by creating a logic state such as a flip-flop in static random access memory (SRAM) or by charging a capacitor in dynamic random access memory (DRAM) data. In both SRAM and...

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Problems solved by technology

[0005] Mask read-only memory (MROM), programmable read-only memory (PROM), and erasable programmable read-only memory (EPROM) non-volatile storage devices are not freely erased and written by the system itself, so it is not easy update memory contents

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