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Current leveling circuit with high linear compensation

A technology of current leveling and current compensation, applied in the direction of adjusting electrical variables, control/regulating systems, instruments, etc., can solve problems such as insufficient linearity

Inactive Publication Date: 2014-08-13
HARBIN INST OF TECH AT WEIHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to achieve a better current leveling effect, the linearity of the current compensation unit in the current leveling circuit is very important. However, the current compensation unit in the existing solutions usually uses a simple transconductance amplifier, which cannot effectively solve the problem of insufficient linearity.

Method used

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  • Current leveling circuit with high linear compensation
  • Current leveling circuit with high linear compensation
  • Current leveling circuit with high linear compensation

Examples

Experimental program
Comparison scheme
Effect test

specific Embodiment approach 1

[0022] Specific implementation mode one: combine figure 1 and figure 2 Describe this embodiment, this embodiment includes a current detection module 1 and a current injection compensation module 2;

[0023] Current detection module 1, used to detect the current I flowing through the cryptographic core circuit core The resulting change in current ΔI core , and convert the changing current ΔI core is the corresponding variable voltage ΔV, and is also used to send the variable voltage ΔV to the current injection compensation module 2;

[0024] The current injection compensation module 2 is used to linearly convert the variable voltage ΔV into the compensation current ΔI R , and by compensating current ΔI R For changing current I core Compensation is performed so that the total power supply terminal detected change current ΔI tot be flattened;

[0025] The current detection module 1 is respectively provided with a variable current ΔI core The acquisition terminal and the...

specific Embodiment approach 2

[0039] Specific implementation mode two: combination figure 2Describe this embodiment, the difference between this embodiment and specific embodiment 1 is that the current detection module 1 is composed of a first NMOS transistor M1, a second NMOS transistor M2, an eleventh NMOS transistor M11, a twelfth NMOS transistor M12, a thirteenth NMOS transistor Composed of PMOS transistor M13, fourteenth PMOS transistor M14, fifteenth PMOS transistor M15 and resistor R1,

[0040] The drain of the first NMOS transistor M1 is the changing current ΔI of the current detection module 1 core At the acquisition end, the drain of the first NMOS transistor M1 and the ground terminal of the cryptographic core circuit are simultaneously connected to the gate of the thirteenth PMOS transistor M13,

[0041] The gate of the first NMOS transistor M1, the gate of the second NMOS transistor M2, the drain of the twelfth NMOS transistor M12 are connected to the drain of the fourteenth NMOS transistor ...

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Abstract

The invention provides a current leveling circuit with high linear compensation, belongs to the field of circuit and electronics and overcomes the disadvantage of insufficient linearity of the existing current injection compensation unit so as to realize the high linear compensation. The current leveling circuit comprises a current detection module and a current injection compensation module, wherein the current detection module is used for detecting changing current DeltaIcore generated by current Icore flowing through a password core circuit, converting the changing current deltaIcore into corresponding changing voltage DeltaV, and transmitting the changing voltage DeltaV to the current injection compensation module; the current injection compensation module is used for linearly converting the changing voltage DeltaV into compensation current DeltaIR, compensating the compensation current DeltaIR for the changing current DeltaIcore so as to offset the total changing current DeltaItot detected by a power supply end; and the current injection compensation module consists of an amplifier A, a third PMOS (P-channel metal oxide semiconductor) transistor M3, a fourth PMOS transistor M4, and a fifth to tenth NMOS (N-channel metal oxide semiconductor) transistors M5 to M10. The current leveling circuit provided by the invention can conceal the change of core current of a chip, and can be widely applied to encryption.

Description

technical field [0001] The invention relates to the field of circuit electronics, in particular to a current leveling circuit structure with high linear compensation used to resist differential power consumption analysis attacks of cryptographic chips. Background technique [0002] Cryptography devices such as smart cards are widely used in various industry sectors such as telecommunications, finance, enterprise security and government, and the importance of security cannot be overstated. Although the embedded features of the cryptographic device make it impossible for attackers to directly access the key information in the cryptographic chip, the cryptographic chip will leak certain side channel information such as power consumption and electromagnetic radiation when it is working. Differential Power Analysis (DPA) ) attack technology uses the correlation between the key data and these information, and can analyze and obtain the value of the key through mathematical statist...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/565
Inventor 王晨旭王新胜喻明艳王进祥韩志伟
Owner HARBIN INST OF TECH AT WEIHAI