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An image sensor packaging structure with a double-layer substrate

A technology of image sensor and packaging structure, which is applied in the direction of electric solid-state devices, semiconductor devices, radiation control devices, etc., and can solve the problems of high packaging structure, substrate thickness that cannot reduce the packaging structure size, and unexplained multi-chip structure, etc.

Inactive Publication Date: 2015-08-26
KING DRAGON INT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the height of the solder balls of the structure and the receiving structure of the extrusion mold, the thickness of the substrate cannot be reduced, which limits the reduction of the size of the package structure.
[0012] The prior art has a complex process for forming the image sensor chip package, and the package structure is too tall and cannot be scaled down
In addition, these prior arts only disclose single-die packaging and do not describe multi-die structures

Method used

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  • An image sensor packaging structure with a double-layer substrate
  • An image sensor packaging structure with a double-layer substrate
  • An image sensor packaging structure with a double-layer substrate

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Embodiment Construction

[0052] The image sensor packaging structure and method with a double-layer substrate of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments of the present invention.

[0053] Such as Figure 6 and Figure 7 As shown, the present invention discloses a chip (or multi-chip) embedded substrate structure and a double-layer structure constructed on both sides of the surface, and illustrates a cross-sectional view of a system package structure, which includes a double-layer substrate with embedded chips And passive components, and according to the present invention on the top construction layer and the pins on the opposite side, with ball matrix arrangement (BGA, ball grid array), flip chip (FC-BGA, flip-chip), chip size package (CSP, chip scale package) and wafer level package (WL-CSP, wafer level chip scale package) etc. for surface mount.

[0054] An image sensor packaging structure, which includes a first s...

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Abstract

The invention provides an image sensor packaging structure having double layers of substrates. The image sensor packaging structure comprises a first substrate which has a grain reception opening and multiple first penetration holes that penetrate through the first substrate, a second substrate which is formed on the first substrate and includes a grain opening window and multiple penetration holes that penetrate through the second substrate. A part of a second wiring diagram is coupled with a part of a third wiring diagram. An image grain contains a conductive pad and a receiving sensing array, wherein the grain reception opening and a sensing array window are exposed to the grain opening window; and penetration hole conductive material is used for filling the multiple second penetration holes, wherein part of the holes of the second penetration holes are coupled with the conductive pad of the image grain.

Description

technical field [0001] The invention relates to an image sensor package structure, in particular to an image sensor package structure with crystal grains embedded in a double-layer substrate. Background technique [0002] In the field of semiconductor devices, as the size of the devices continues to shrink, the density of the devices also continues to increase. Technical requirements in terms of packaging or interconnection must also be improved to meet the above conditions. Traditionally, in a flip-chip attachment method, an array of solder bumps is formed on the surface of the die. The above solder bumps can be formed by using a solder composite material and passing through a solder mask to produce a desired solder bump pattern. The functions of the chip package include power distribution, signal distribution, heat dissipation, protection and support, etc. As semiconductors become more complex, traditional packaging techniques, such as lead frame packages, flex packages...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/146
CPCH01L2924/0002
Inventor 杨文焜
Owner KING DRAGON INT