Semiconductor package structure and manufacturing method thereof

Abstract

Embodiments of the present invention provide a semiconductor package structure and a manufacturing method thereof. The semiconductor packaging structure includes a substrate, a first semiconductor element, a second semiconductor element and a first adhesive layer. The first semiconductor element is disposed on the substrate, and the first semiconductor element has a side surface. A second semiconductor element is disposed on the substrate adjacent to the first semiconductor element, the second semiconductor element having a side opposite to a side of the first semiconductor element. The first adhesive layer is disposed between the first semiconductor element and the second semiconductor element, and only adheres the side surfaces of the first semiconductor element and the second semiconductor element.

Description

technical field [0001] The invention relates to a semiconductor packaging structure and a manufacturing method thereof, in particular to a semiconductor packaging structure with small and stable spacing between semiconductor elements and a manufacturing method thereof. Background technique [0002] In advanced wafer level packaging (advanced Wafer Level Package, aWLP) technology, it is often necessary to bond a plurality of semiconductor elements such as a die to a substrate. Generally speaking, for example, the alignment of the first wafer is carried out first, and it is bonded to the substrate, and then the alignment and bonding of the second wafer is carried out. This step is repeated until the bonding of all wafers is completed, and then A baking step is then performed to fix the wafer on the substrate. [0003] However, in such a packaging method, since it is necessary to align and bond the chips one by one, the utilization rate of the die bonder cannot be improved. ...

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Problems solved by technology

[0003] However, in such a packaging method, since it is necessary to align and bond the chips one by one, the utilization rate of the die bonder cannot be improved.

[0004] In addition, because each wafer is aligned and bonded separately, affected by the precision of the die bonder, the distance between the wafers will have considerable variability, and a space must be reserved to avoid overlapping wafers, resulting in failure Reduce the distance between wafers to less than 50 microns

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