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Scribing method, chip manufacturing method and convex glass packaging diode

A manufacturing method and chip technology, applied in fine working devices, manufacturing tools, semiconductor/solid-state device manufacturing, etc., can solve problems such as high fragmentation rate, and achieve the effect of reducing the thinning fragmentation rate

Inactive Publication Date: 2013-06-26
HANGZHOU SILAN INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The invention provides a dicing method to solve the problem of extremely high fragmentation rate during the thinning manufacturing process of ultra-thin wafers

Method used

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  • Scribing method, chip manufacturing method and convex glass packaging diode
  • Scribing method, chip manufacturing method and convex glass packaging diode
  • Scribing method, chip manufacturing method and convex glass packaging diode

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] Please refer to figure 1 , the present embodiment provides a scribing method, the method includes the following steps:

[0038] S11: cutting along the scribing lane of the wafer, and retaining a predetermined thickness; and

[0039] S12: Applying pressure to the wafer to split it along the cracks to form a number of chips with sidewalls having a stepped structure.

[0040] By dividing the scribing step into two steps, first cutting along the scribing lane of the wafer and retaining a predetermined thickness (not cutting through), and then applying pressure to the wafer to split the wafer along the crack, forming a number of sidewalls as stepped structures The step structure can effectively solve the problem of the chip standing sideways during packaging, and ensure that the packaging requirements can be met even when the chip is thicker. Under the premise of ensuring the normal assembly of the package, the chip thinning fragmentation rate is reduced.

Embodiment 2

[0042] Please refer to figure 2 , the present embodiment provides a chip manufacturing method, the method includes the following steps:

[0043] S21: Thinning the backside of the wafer;

[0044] S22: forming a metal layer on the backside of the thinned wafer;

[0045] S23: pasting a blue film on the back of the wafer;

[0046] S24: cutting along the scribing lane of the wafer, and retaining a predetermined thickness; and

[0047] S25: applying pressure to the wafer to split the wafer along the cracks to form a plurality of chips with sidewalls having a stepped structure.

[0048] Combine below Figure 3 to Figure 7 The chip manufacturing method of the present invention introduced in more detail.

[0049] Such as image 3 As shown, first, put the wafer 100 with the PN junction device structure on the front side into the thinning equipment, and use a grinding head to thin the back side of the wafer 100. In this embodiment, a 600# grinding head can be used for thinning , ...

Embodiment 3

[0060] After the chip is formed by the above-mentioned manufacturing method, the chip electrical parameter test can be carried out, and the glass package can be carried out after the chip electrical parameter test is completed, forming a chip such as Figure 8 The bump glass package diode shown, the bump glass package diode includes: two electrode metal pins 301, 302; a chip 200 arranged between the two electrode metal pins; and a protection chip 200 clear glass 400. Since the sidewall of the chip 200 has a stepped structure, the problem of standing sideways during packaging can be avoided, and even if the chip 200 is thicker, it can still meet the packaging requirements, thereby reducing chip thinning and chipping.

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Abstract

The invention discloses a scribing method, a chip manufacturing method and a convex glass packaging diode. The scribing method includes two steps: firstly cutting is performed along a scribing line of a chip, predetermined thickness is preserved, and then pressure is exerted on the chip to enable the chip to be split along cracks to form a plurality of chips with side walls of step structures. The step structures can effectively solve the problem of sideward standing of the chip when the chip is packaged and guarantee that packaging requirements can be met when the thickness of the chip is thick, namely thinning fragment rate of the chip is reduced under the condition of guarantee of normal assembly.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a scribing method, a chip manufacturing method and bump glass packaged diodes. Background technique [0002] The traditional scribing method mainly uses a mechanical diamond blade for cutting. Thousands of chips will be produced on a wafer, and there will be a certain distance between adjacent chips (usually 40 μm to 100 μm), which is generally called a scribing lane. The traditional scribing method is to use a diamond blade to cut along the designed scribing lane of the wafer, cut through the wafer and separate it into individual chips. [0003] Bump glass-encapsulated diode (referred to as glass-encapsulated diode) is a common form of diode packaging, which mainly refers to placing the semiconductor chip flat between two electrode metal pins and sealing it with transparent glass for protection. For bump glass packaged diodes, in order to ensure the normal assem...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/78B28D5/04H01L21/329H01L29/861H01L23/28
Inventor 王明辉王平
Owner HANGZHOU SILAN INTEGRATED CIRCUIT