Check patentability & draft patents in minutes with Patsnap Eureka AI!

Stacking type packaging structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of reducing die yield, complex manufacturing method of TSV structure, and high cost

Inactive Publication Date: 2013-07-10
ADVANCED SEMICON ENG INC
View PDF7 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the manufacturing method of the TSV structure is complicated and costly, and its formation is also easy to cause damage to the die due to additional force, thus reducing the yield of the die

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Stacking type packaging structure and manufacturing method thereof
  • Stacking type packaging structure and manufacturing method thereof
  • Stacking type packaging structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0051] figure 1 A semiconductor structure unit 102 of a package-on-package structure according to an embodiment is shown. A die 104 has opposite surfaces 106 and 108 , and an edge surface 110 between the surfaces 106 and 108 . An active layer 112 and sealing ring 114 are disposed on the surface 106 of the die 104 .

[0052]The circuit layer 116 includes a plurality of circuits and is disposed on the surface 106 of the die 104 . The circuit layer 117 includes a plurality of circuits and is disposed on the surface 108 of the die 104 . At least one circuit of the circuit layer 116 can be electrically connected to at least one of the circuit layer 117 via the edge surface 110 of the die 104, so the through silicon via structure (through silicon via), which is more expensive than the circuit layer 116 and the circuit layer 117, may not be required. ; TSV), in other words, the manufacturing cost of the semiconductor structural unit 102 is low. In one embodiment, for example, the...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Heightaaaaaaaaaa
Widthaaaaaaaaaa
Login to View More

Abstract

The invention discloses a stacking type packaging structure and a manufacturing method of the stacking type packaging structure. The manufacturing method of the stacking type packaging structure comprises the following steps: a first crystalline grain and a second crystalline grain are provided, the first crystalline grain and the second crystalline grain are respectively provided with a first surface, a second surface and an edge surface, each first surface is opposite to each second surface, and each edge surface is arranged between each first surface and each second surface; a plurality of electric conduction connection elements are formed on the first surface, the second surface and the edge surface of the first crystalline grain; each electric conduction connection element comprises a solder part; and the solder parts are in physical connection and are in electric connection with the elements on the first surface of the second crystalline grain.

Description

technical field [0001] The invention relates to a package-on-package structure and a manufacturing method thereof. Background technique [0002] In today's information society, users are pursuing high-speed, high-quality, and multi-functional electronic products. As far as product appearance is concerned, the design of electronic products is moving towards the trend of light, thin, short and small. In order to achieve the above purpose, many companies incorporate the concept of systemization when designing circuits, so that a single chip can have multiple functions, so as to save the number of chips configured in electronic products. In addition, in terms of electronic packaging technology, in order to meet the trend of light, thin, short, and small design, packaging design concepts such as multi-chip module (MCM), chip scale package (chip scale package) have also been developed. ; CSP) package design concept and chip stack package structure package design concept. [000...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L23/488H01L25/00H01L21/60
CPCH01L2224/11
Inventor 洪嘉临
Owner ADVANCED SEMICON ENG INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com