Serial interface flash memory and clock frequency multiplier circuit

Abstract

The invention discloses a serial interface flash memory comprising a selecting circuit used for selecting one signal from the clock signal and multiplied clock as a clock signal of the serial interface flash memory, and a clock frequency multiplier circuit. The clock frequency multiplier circuit comprises a delay module used for receiving the clock signal and outputting a first delay signal after delaying, an XOR module used for carrying out XOR upon the clock signal and the first delay signal to acquire a multiplied clock signal, and a control module used for controlling whether the delay length of the first delay signal is smaller than a half of the clock signal pulse width. If the delay length of the first delay signal is smaller than a half of the clock signal pulse width, delay length of the delay module is increased, and if not, the delay length of the delay module is reduced. According to the invention, the flash memory can be compatible with two data transmission modes of SDR and DDR.

Description

technical field [0001] The invention relates to the field of circuits, in particular to a serial interface flash memory and a clock frequency multiplication circuit. Background technique [0002] Serial interface flash memory (SPI FLASH) is a widely used FLASH memory. [0003] like figure 1 As shown, SPI FLASH adopts a serial data input / output method, which is mainly based on the single transfer rate (SDR) interface mode. Since all instructions, addresses and data (such as figure 1 The clock signal CLK, input data DI, output data DO and signals WP#, HOLD#, CS# shown in ) are all serially input / output, so the slow transmission rate has become the biggest shortcoming of SPI FLASH. The timing diagram of CLK, DI and DO is as follows figure 2 shown. [0004] Speeding up the clock frequency can increase the data transfer rate of SPI FLASH. But too fast clock will sharply increase the difficulty of system design, resulting in poor anti-noise ability and stability of the syst...

AI Technical Summary

Problems solved by technology

However, due to the different interface methods of DDR and SDR, they are often incompatible with each other, and many modules such as the controller and interface circuit of SPI FLASH need to be redesigned.

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