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Internuclear data message caching method and equipment of multinuclear system

A multi-core system and data message technology, applied in the field of network communication transmission, can solve problems such as unfavorable multi-core data message forwarding business promotion and application, inability to guarantee priority caching, inability to filter incoming messages, etc., so as to improve inter-core resistance. The effect of burst performance

Active Publication Date: 2013-10-02
XINHUASAN INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The anti-burst performance between the cores caused by the existing technical solutions is relatively poor, especially when the number of forwarding cores in the multi-core system increases, this disadvantage becomes more obvious
In addition, the above scheme cannot realize the filtering of incoming packets, that is, it cannot guarantee that high-priority packets with specific characteristics can be cached first when the packets transmitted between two cores are inevitably discarded.
These two defects are not conducive to the promotion and application of multi-core data message forwarding business

Method used

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  • Internuclear data message caching method and equipment of multinuclear system
  • Internuclear data message caching method and equipment of multinuclear system
  • Internuclear data message caching method and equipment of multinuclear system

Examples

Experimental program
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Embodiment 1

[0060] In this embodiment, it is assumed that the multi-core system has four forwarding cores to realize the forwarding of messages between forwarding cores. The structural diagram is as follows figure 1 As shown, they are respectively forwarding core 1, forwarding core 2, forwarding core 3 and forwarding core 4, and any two forwarding cores can transmit messages to each other. In this embodiment, each forwarding core is provided with a FIFO buffer queue corresponding to other forwarding cores one-to-one for receiving other forwarding core data messages, such as image 3 As shown, for the convenience of description, image 3 Only the FIFO cache queue corresponding to forwarding core 1 and other forwarding cores is shown, where queue D is the FIFO cache queue corresponding to forwarding core 1 and forwarding core 2, and queue E is the FIFO cache queue corresponding to forwarding core 1 and forwarding core 3. Queue F is a FIFO buffer queue corresponding to forwarding core 1 and...

Embodiment 2

[0077] This embodiment still uses the data parameters of method embodiment 1, and adds a new parameter on the basis of method embodiment 1—the congestion threshold C of the whole machine, which is a positive integer, and N≤C<M. When the number of files S decreases to the congestion threshold C of the whole machine, the idle buffer resources start to be tight, and all packets cannot be guaranteed to be cached. High-priority packets are enqueued, and low-priority packets are discarded. Packets that match the ACL are high-priority packets, and packets that do not match the ACL are low-priority packets. A new filter operation for incoming packets is added, which can give priority to ensuring that high-priority packets are queued for processing when the packets passed between two forwarding cores are inevitably discarded. In this embodiment, it is assumed that C=2000, that is, when the number S of idle cached messages of the whole machine drops to 2000 messages (including 2000), th...

Embodiment 3

[0099] The solutions of method embodiment 1 and method embodiment 2 introduce the solution of the present invention from the perspective of message entry into the queue, and this embodiment describes the solution of the present invention from the perspective of message dequeue.

[0100] Figure 6 It is the flow chart of this embodiment, and the technical solution of the present invention is described by taking the message dequeue in the queue D as an example, as Figure 6 As shown, this embodiment includes the following steps:

[0101] Step 601: The packets in the queue D are about to be dequeued.

[0102] Step 602: Determine whether the current number of buffered packets in queue D is greater than queue threshold B?

[0103] In this step, before packet Y is dequeued, it is first necessary to determine whether the current number of buffered packets in queue D is greater than queue threshold B? If yes, go to step 603; otherwise, go to step 605.

[0104] Step 603: Packet Y i...

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Abstract

The invention discloses an internuclear data message caching method and equipment of a multinuclear system. The caching method is used for caching M messages and transmitting the multinuclear system with N nucleuses. Each transmitted nucleus is equipped with an FIFO (first in, first out) buffer queue. The FIFO buffer queue is in one-to-one correspondence with that of other transmitted nucleuses and used for receiving the data messages of other transmitted nucleuses. When the message enqueues, if the number of the messages cached at present of the FIFO buffer queue corresponding to the message is less than a queue threshold, the message enqueues, and the number of the cached messages of the FIFO buffer queue adds one; otherwise, the number (S ) of the messages in free cache of a complete machine is further judged, if S is greater than or equal to the number (N) of transmitted nucleuses, the message enqueues, the number of the cached messages of the FIFO buffer queue adds one, and the number (S ) of the messages in free cache of the complete machine subtracts one; otherwise, the message is discarded. With adoption of the scheme, the internuclear emergency resistance performance of the multinuclear system can be effectively improved, and the popularization and application of the forward service of multinuclear data messages are facilitated.

Description

technical field [0001] The invention relates to network communication transmission technology, in particular to a method and device for caching data messages between cores of a multi-core system. Background technique [0002] A multi-core system (processor) refers to the integration of more than two complete computing engines (cores) in one processor, so that the multi-core processor can perform more tasks within a specific clock cycle. When a multi-core processor processes a message, depending on the specific business to be processed, or based on load sharing considerations, it may involve the transfer of the same message between multiple forwarding cores. The forwarding core here refers to each core in the multi-core processor responsible for forwarding data packets, which can work in an asynchronous symmetric multiprocessing (ASMP, Asymmetric Symmetric Multiprocessing) manner. Theoretically speaking, any two forwarding cores have the possibility of transmitting messages ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/861
Inventor 杨逸
Owner XINHUASAN INFORMATION TECH CO LTD
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