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Asymmetric Ring Topology for Latency Reduction in On-Chip Ring Networks

A ring network, asymmetric technology, applied in the direction of ring network, bus network, data exchange network, etc., can solve the problem that the ring network cannot be enlarged

Active Publication Date: 2016-11-23
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, ring networks do not scale well with the number of routers

Method used

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  • Asymmetric Ring Topology for Latency Reduction in On-Chip Ring Networks
  • Asymmetric Ring Topology for Latency Reduction in On-Chip Ring Networks
  • Asymmetric Ring Topology for Latency Reduction in On-Chip Ring Networks

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Embodiment Construction

[0019] 9. It should first be understood that although illustrative implementations of one or more examples are provided below, many techniques, whether currently known or existing, can be used to implement the disclosed systems and / or methods . The present invention should never be limited to the illustrative embodiments, drawings and techniques described below, including the exemplary designs and embodiments described and described herein, but may be within the scope of the appended claims and their equivalents Make modifications within the full scope of.

[0020] 10. This article reveals the asymmetric ring network topology and the method of routing in the asymmetric ring network topology. An asymmetric ring network topology, also called an asymmetric ring network, uses more than two ring networks that are routed asymmetrically through a given group of nodes so that the nodes of a given group can proceed in different orders Connect to form a network including different ring n...

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Abstract

A device comprising a chip comprising a plurality of nodes, a first plurality of links connecting the plurality of nodes in a first ring network having a first topology, and a second ring network having a second topology A second plurality of links connecting the plurality of nodes in a network, wherein the first topology is different from the second topology.

Description

[0001] Cross reference of related applications [0002] The present invention requires the title of the invention submitted by Rohit Sunkam Ramanujam and others on October 31, 2011 to be "Asymmetric ring network topology for reducing time delay in an on-chip ring network" (Asymmetric Ring Topology for Reduced Latency in On-Chip Ring Networks)" U.S. Non-Provisional Patent Application No. 13 / 285,733, and was filed on February 3, 2011 by Rohit Sunkam Ramanujan (Rohit Sunkam). Ramanujam et al. filed a US provisional patent application No. 61 / 439,229 entitled "Asymmetric Ring Topology for Reduced Latency in On-Chip Ring Networks" Priority of the earlier application of the case, the content of these earlier applications is incorporated into this text by introducing in full. [0003] About sponsored by the federal government [0004] Research or development statement [0005] Not applicable. [0006] Refer to the microfilm appendix [0007] Not applicable. Technical field Background techniq...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/40H04L12/42G06F15/78
CPCG06F15/7825H04L12/40189H04L12/42Y02D10/00
Inventor 拉海特·桑加穆·拉马努加穆赛勒斯·库玛威廉姆·林奇
Owner HUAWEI TECH CO LTD