Adaptive bias circuit and voltage stabilizing circuit

A technology of self-adaptive biasing and voltage-stabilizing circuit, applied in the direction of adjusting electrical variables, instruments, control/regulating systems, etc., can solve the problems of large load resistance voltage ratio, small voltage margin, large working current of radio frequency modules, etc. Ease of testing and tuning
CN103455072AInactive Publication Date: 2013-12-18NATIONZ TECH INC

Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
NATIONZ TECH INC
Publication Date
2013-12-18
Estimated Expiration
Not applicable · inactive patent

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention discloses an adaptive bias circuit and a voltage stabilizing circuit. The adaptive bias circuit comprises a detection unit and a feedback control unit. The detection unit is used for detecting electrical parameters of a load resistor in an opposite terminal circuit and generates and transmits corresponding electrical signals to the feedback control unit. The feedback control unit is used for generating controls signals according to the electrical signals and transmitting the control signals to the opposite terminal circuit. The control signals are used for adjusting voltage of the load resistor in the opposite terminal circuit. The adaptive bias circuit allows voltage drop of the load resistor to be constant and insusceptible to circuit environments.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention relates to the field of wireless communication, in particular to an adaptive bias circuit and a voltage stabilizing circuit. Background technique

[0002] In recent years, wireless and mobile communication systems have developed rapidly, and as a key module, radio frequency integrated circuits (RFICs) have naturally become a research hotspot. The RFIC realized by CMOS process began to recover in the mid-1990s. With the reduction of device feature size, the performance of MOS devices has been continuously improved. The RFIC designed by using CMOS process has achieved good radio frequency performance. The advantages of low cost, high integration and low power consumption make CMOS RFIC become the mainstream.

[0003] Although silicon CMOS technology has many advantages mentioned above, it also brings some challenges to RFIC with the proportional reduction of device size, which brings many difficulties to circuit design, especially the redu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More