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A method for writing and reading data in a cache, and a cache controller

A technology for data writing and data reading, applied in the field of memory, can solve the problems of wasting time and consuming large power consumption, and achieve the effect of avoiding power consumption and time consumption

Active Publication Date: 2018-01-09
HUAWEI TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, experimental research shows that when the cache is used as a cache for data stored in the memory, more than 90% of the data read by the processor is read from the cache, and about 30% of the data stored in the cache It is zero data, and the reading and writing of zero data will consume a lot of power consumption and waste time, wherein, zero data means that the cached data in the cache block in the cache is zero

Method used

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  • A method for writing and reading data in a cache, and a cache controller
  • A method for writing and reading data in a cache, and a cache controller
  • A method for writing and reading data in a cache, and a cache controller

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Embodiment Construction

[0050] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present invention.

[0051] Embodiments of the present invention provide a method for writing and reading data in a cache, and a cache controller, which are used to reduce power consumption and Shorten data reading or data writing time.

[0052] see figure 1 , is an embodiment of a cache data writing method in the embodiment of the present invention, including:

[0053] 101. Receive the data write request sent by the processor and the data to be written, and the data write request ...

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Abstract

The invention discloses a data writing and reading method in a cache as well as a cache controller. The method provided by the invention comprises the steps of receiving data writing request and to-be-written data in data transmitted by a processor, wherein the data writing request contains the address of a high-speed cache block; reading first data used for caching the high-speed cache block of the to-be-cached data in the high-speed cache block; using written data to replace partial or full data in the first data according to the address of the high-speed cache block, so as to obtain second data; detecting whether the second data is zero; if the second data is zero, setting the zero data identifier bit of the high-speed cache block used for caching the to-be-written data to be true, so as to finish data writing. Therefore, the power consumption and consumed time caused by the writing of the second data can be effectively prevented.

Description

technical field [0001] The present invention relates to the field of memory, in particular to a method for writing and reading data in a high-speed cache memory (English full name: cache), and a cache controller. Background technique [0002] The speed at which the processor processes data is very fast, and the access time of the memory is hundreds of times the clock cycle of the processor. In order to reduce the speed mismatch between the processor and the memory, a cache can be added to the system. The cache exists in the memory The first-level memory between the processor and the processor has a smaller capacity but a much higher speed than the memory, which is close to the processor's data processing speed. The cache can store a subset of the data in the memory, so that the processor can read from the cache Data or write data to cache to improve data processing speed. [0003] At present, experimental research shows that when the cache is used as a cache for data stored...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06G06F12/0877
CPCY02D10/00
Inventor 韩晶江涛侯锐张科
Owner HUAWEI TECH CO LTD
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