Peripheral circuit for main control circuit
A main control circuit and peripheral circuit technology, applied in the direction of logic circuit connection/interface layout, logic circuit coupling/interface using field effect transistors, etc., can solve the problem that the switching state of the main control circuit cannot be memorized at the same time, and achieve memory retention time, consistent effect
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no. 1 example
[0025] See figure 2 A peripheral circuit for a main control circuit of the present invention is used in a main control circuit that can simultaneously control the working states of two branches. The main control circuit includes at least the following ports: L1 port, L2 port, GND port, I / O port, VCC port and CLK port, when any one of L1 port or L2 port is in high level state, I / O port is in high level state, and when L1 port and L2 port are in low level or the same When in the high state, the I / O port is in the low state. The GND port of the main control circuit is grounded, the gate of the first rear PMOS transistor Q1 on the first branch M1 controlled by the main control circuit is connected to the L1 port of the main control circuit through the first current limiting resistor R1, and the second branch The gate of the second rear-stage PMOS transistor Q2 on the circuit M2 is connected to the L2 port of the main control circuit through the second current limiting resistor R2...
no. 2 example
[0030] See image 3 , The peripheral circuit for a main control circuit of the present invention can be used in main control circuits such as the BL22P02 main control chip. The GND port of the main control circuit is grounded. The first branch M1 and the second branch M2 controlled by the main control circuit are correspondingly connected to the L1 port and the L2 port of the main control circuit through the first current limiting resistor R1 and the second current limiting resistor R2. On the basis of the first embodiment, a first bias resistor R5 connected to the source and gate of the first rear-stage PMOS transistor Q1 is added to the first branch M1. A second bias resistor R6 connected to the source and gate of the second rear-stage PMOS transistor Q2 is added to the second branch M2. The main control circuit switches the working states of the first branch M1 and the second branch M2 by controlling the first rear PMOS transistor Q1 and the second rear PMOS transistor Q2....
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