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Master-slave synchronous serial communication bus based on node cascading and implementation method thereof

A technology of synchronous serialization and implementation method, applied in the fields of instruments, electrical digital data processing, etc., can solve the problems of limited number of nodes, communication distance and speed, to extend the network communication distance and anti-interference ability, ensure the timing relationship, The effect of improving the communication distance

Active Publication Date: 2015-03-25
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to solve the problem that the number of nodes, communication distance and speed are all limited due to the way that the master-slave node multiple

Method used

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  • Master-slave synchronous serial communication bus based on node cascading and implementation method thereof
  • Master-slave synchronous serial communication bus based on node cascading and implementation method thereof
  • Master-slave synchronous serial communication bus based on node cascading and implementation method thereof

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specific Embodiment approach 1

[0028] Specific implementation mode one: the following combination figure 1 Describe this embodiment, the master-slave synchronous serial communication device based on node cascading described in this embodiment, the communication device includes a master node and n slave nodes, n is a positive integer, and the master node includes a master node controller 1 and an isolated Differential module 2, the master node controller 1 includes a master transmitting module M_TX and a master receiving module M_RX, each slave node includes a slave node controller 3 and two isolated differential modules 2, and the slave node controller 3 includes a first slave receiving module RX1 , the second slave receiving module RX2, the first slave sending module TX1 and the second slave sending module TX2;

[0029] The main transmitting module M_TX and the isolated differential module 2 of the main node are connected through the energy signal line M_TXD_EN, the clock signal line M_TXD_CLK and the data...

specific Embodiment approach 2

[0036] Specific implementation mode two: the following combination figure 2 Describe this embodiment, this embodiment will further explain the first embodiment, in the slave node controller 3, the first slave receiving module RX1 and the second slave transmitting module TX2 pass the differential bus state identification signal line IDLEFlag, and the back-end slave node receives the identification The signal line BackFlag, the master node receiving identification signal line S2MFlag, the clock signal line CLK1 and the data signal line DATA1 are connected; the second slave receiving module RX2 and the first slave sending module TX1 pass the address matching identification signal line EqualFlag and the enabling identification signal line EnableFlag, the clock signal line CLK2 and the data signal line DATA2 are connected and connected; the first slave receiving module RX1 assigns the signals on the clock signal line S1_RXD_CLK and the data signal line S1_RXD to the clock signal li...

specific Embodiment approach 3

[0037] Specific implementation mode three: the following combination Figure 3-Figure 5 Describe this implementation mode, the implementation method of the master-slave synchronous serial communication device based on node cascading described in this implementation mode, the specific process of this implementation method is:

[0038] The master node controller 1 periodically reads the valid data received by the main receiving module M_RX, and then sends the valid data group and control instructions to be sent to the main sending module M_TX, and assigns the sending end flag to the sending start Start the main transmission module M_TX by means of the identification bit. After the main transmission module M_TX is started, the valid data is assembled into multiple data frames, and the clock signal is sent to each node in time-sharing serially through the differential bus;

[0039] Master node controller 1 reads the dual-port memory RAM according to the system clock through the ad...

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Abstract

The invention discloses a master-slave synchronous serial communication bus based on node cascading and an implementation method of the master-slave synchronous serial communication bus based on node cascading and relates to a master-slave synchronous serial communication bus. The master-slave synchronous serial communication bus based on node cascading aims to solve the problems that the number of nodes, the communication distance and the velocity are all limited because a master-slave node multiplexing clock and a data bus are adopted for existing synchronous serial communication. The master-slave synchronous serial communication bus based on node cascading comprises a master node and n slave nodes, wherein n is a positive integer; the master node comprises a master node controller and an isolation difference module; the master node controller comprises a master sending module M_TX and a master receiving module M_RX; each slave node comprises a slave node controller and two isolation difference modules; each slave node controller comprises a first slave receiving module RX1, a second slave receiving module RX2, a first slave sending module TX1 and a second slave sending module TX2. The master-slave synchronous serial communication bus based on node cascading is applied to synchronous serial communication.

Description

technical field [0001] The invention relates to a master-slave synchronous serial communication bus. Background technique [0002] Synchronous serial communication is a communication method for continuous serial data transmission. Compared with asynchronous communication, it is more suitable for the transmission of large amounts of data, such as SPI synchronous serial communication. This type of communication often uses the master-slave node to multiplex the clock and data bus to build a master-multi-slave communication network, and the data sending and receiving clocks of each node come from the master node. Therefore, affected by the load capacity of the interface chip and the delay of the communication line, the number of slave nodes, communication distance and speed are all limited. Contents of the invention [0003] The purpose of the present invention is to solve the problem that the number of nodes, communication distance and speed are all limited due to the way th...

Claims

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Application Information

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IPC IPC(8): G06F13/38G06F13/40
CPCG06F13/4022
Inventor 张元飞金明河刘宏
Owner HARBIN INST OF TECH
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