68 results about "Synchronous serial communication" patented technology

The present invention provides a synchronizing data protocol comprising one or more serial input-output (SIO) control word(s) and data passed across a high voltage interface, to allow the elimination of a frame synchronization signal (and corresponding AC coupling capacitors). The present invention has particular applicability to, e.g., time division multiplexed (TDM) data, serial data communication devices, or synchronous serial communication interfaces in general, and to the communication between a controller and a codec in an audio codec device in accordance with the AC '97 Specification, i.e., the AC Link. The synchronizing data protocol is implemented over a transmit data signal line to provide occasional synchronization (i.e., not frame-by-frame synchronization) between the two communicating devices. The master device includes a preamble insertion module to insert a predetermined preamble code word into the transmitted data stream. An interrupt is sent to the slave device by withholding the data clock signal for a predetermined amount of time. Upon receipt of the interrupt, the slave device monitors the data stream for the presence of the preamble code word. Upon detection of the preamble code word, data transmitted by the codec is again enabled.

The invention belongs to the technical field of digital communication, and particularly relates to a method for automatically detecting asynchronous serial port communication protocol on the basis of level sampling. The method includes firstly sampling level signals of asynchronous serial port communication, and detecting asynchronous serial port communication Baud rate according to the relation of the asynchronous serial port communication Baud rate and average time span of a single low level of the sampled signals; secondly, determining data frame bit digits and data frame positions of target signals which are the detected level signals by Baud rate by means of stop bit correlation matching algorithm; thirdly, analyzing in-frame data and inter-frame bit distance to determine data bit digits, checking manners and stop bit digits of the target signals; and finally determining a data coding manner of the target signals by Bayes policy method on the basis of the minimum error rate. The method can be applicable to communication protocol detection of communication and data transmission equipment utilizing the asynchronous serial port communication protocol.

Provided is a one-master multi-slave high-speed synchronous serial communication data transmission method, which is suitable for the field of master-slave multi-channel high-speed transmission. Data to be transmitted and a communication clock are modulated to one signal line in a coding manner and the data are transmitted by the one-master multi-slave mode, thereby simplifying the system communication structure, reducing the number of communication lines and the communication cost and increasing the transmission speed. In addition, an excellent serial synchronous clock is obtained by the decoding method, thereby reducing the bit error rate of transmission.

A method and apparatus for determining the appropriate timing interval for each bit or data symbol in serial data communications. A sending device transmits a predetermined bit sequence, such as a binary pattern corresponding to one byte, either on its own initiative or in response to an action of a receiving device. A microprocessor in the receiving device measures a calibration time interval between the leading edge of a start bit and a subsequent marker transition, either between subsequent data bits or between the final data bit and the stop bit. This measured interval may be mathematically converted to units useful to calibrate a function or device that conducts input/output operations. Optionally, the process may be repeated periodically to compensate for clock rate drift. This invention may be used for autobaud data rate detection, or matching the actual data rate of a remote serial device, and permits accurate communications without precision timing references.

The speed of asynchronous serial communications is detected by determining a duration of a data bit within an asynchronous data stream. The duration of the data bit is used to generate a clock frequency. The clock frequency is used to clock data from the asynchronous data stream into a register. The clocked data is processed according to an error indication.

The invention provides a master-slave synchronous serial communication bus based on a differential signal and a realization method of the master-slave synchronous serial communication bus, relates to a master-slave synchronous serial communication bus, and aims at solving the problems that the existing master-slave synchronous serial communication is low in transmission speed, the real-time transmission of massive data cannot be guaranteed, and only the single byte check can be realized through code error detection. A master-slave synchronous serial communication bus based on the differential signal comprises a master controller, a master isolation difference module, n slave isolation difference modules and n slave controllers; the master controller comprises a master transmitting module and a master receiving module; each of the slave controllers comprises a slave transmitting module and a slave receiving module; the slave isolation difference modules are same in structure; each of the slave isolation difference modules comprises a digital isolation module, a DC/DC (Direct Current/Direct Current) power isolation module, an LDO (Low Dropout Regulator) voltage regulator module, two difference modules, two current noise suppressors, two two-way transient voltage control modules and two impedance matching resistors. The master-slave synchronous serial communication bus and the realization method of the master-slave synchronous serial communication bus are mainly used for master-slave synchronous serial communication.

The invention discloses a master-slave synchronous serial communication bus based on node cascading and an implementation method of the master-slave synchronous serial communication bus based on node cascading and relates to a master-slave synchronous serial communication bus. The master-slave synchronous serial communication bus based on node cascading aims to solve the problems that the number of nodes, the communication distance and the velocity are all limited because a master-slave node multiplexing clock and a data bus are adopted for existing synchronous serial communication. The master-slave synchronous serial communication bus based on node cascading comprises a master node and n slave nodes, wherein n is a positive integer; the master node comprises a master node controller and an isolation difference module; the master node controller comprises a master sending module M_TX and a master receiving module M_RX; each slave node comprises a slave node controller and two isolation difference modules; each slave node controller comprises a first slave receiving module RX1, a second slave receiving module RX2, a first slave sending module TX1 and a second slave sending module TX2. The master-slave synchronous serial communication bus based on node cascading is applied to synchronous serial communication.

Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.

The invention relates to a synchronous clocked communication system, for example a distributed automation system, the stations of which can be arbitrary automation components and which are coupled to one another via a data network. Using the disclosed method for integrating decentralized input/output modules, these decentralized input/output modules can be linked into the synchronous clocked communication system in such a manner that they can use their characteristics unrestrictedly. Thus, in particular, the detection of input signals and the output of output signals is possible in a deterministic and synchronous manner in the decentralized input/output modules. In addition, the disclosed method enables input signals to be detected with an accuracy of less than the length of one communication cycle of the communication system and to support the switching of output signals in smaller time granularities than the length of one communication cycle which, in particular, finds use, e.g. for switching cams.

A synchronous serial communication interface device comprises three parts, namely a master control unit, a synchronous clock receiving unit and a synchronous data output unit. According to a synchronous clock signal, received asynchronous serial data or parallel data are converted into synchronous serial differential data which are output; the synchronous clock receiving unit is used for converting a received synchronous clock differential signal into a single-ended signal and transmitting the single-ended signal to the master control unit; the synchronous data output unit is used for differencing of synchronous data output by the master control unit so as to improve the anti-interference performance in the data transmission process. The synchronous serial communication interface device has quite strong practicability; by means of being connected with the synchronous serial communication interface device, external devices which are subjected to asynchronous serial output or parallel output can achieve the synchronous serial communication function, and therefore the application range of the synchronous serial communication interface device is expanded to a large extent.

The invention relates to the field of communication, in particular to a full-duplex asynchronous serial communication method. The method comprises the following steps of the step 1, carrying out pre-communication on two microprocessors to carry out first clock detection, the step 2, initializing the two microprocessor in serial communication, storing data sent and received by the two microprocessors into a data storer and finishing the data transmission between the sent and received data and a transmitting register DXR of an McBSP and data transmission between the sent and received data and a receiving register DDR through a DMA channel, the step 3, sending data and packing characters to be sent into data formats received by serial communication when the data are sent, and the step 4, receiving the data and sampling and correcting the received data flow to carry out second clock detection. On the premise without increasing hardware cost, the full-duplex asynchronous serial communication method improves the work efficiency of a CPU, reduces clock skew between signals and enables serial communication to be more stable, efficient, low in cost and simple and easy to achieve.

A master control device connected to a plurality of slave control devices via a network is configured to include an own local time counted by a counter unit, in a message and transmit the message to the slave control devices by the timing synchronization unit, calculate a difference between a reception time of a message transmitted from the slave control device, which has received the message, at a timing corrected in accordance with the local time and a pre-calculated message reception predicted time by a timing synchronization determination unit, calculate a correction amount for timing of the slave control devices using the difference by a timing synchronization correction unit, add the correction amount to the local time, include the local time in a message, and transmit the message to the slave control devices.

The invention discloses a communication method of a synchronous serial communication interface. According to the communication method of the synchronous serial communication interface, data frames are adopted to perform communication, wherein each data frame includes a start bit, a command area, data areas and a checksum, wherein the command area is used for determining the effect of a current data frame, the data areas is data which are transmitted according to commands in the current data frame, and the checksum is check values for checking the start bit, the command area and the data in the data areas of the data frame; after the communication of each data frame terminates, both sides of communication clearly know whether faults occur in communication; and at the same time, read-write operation marks can be obtained through command field decoding. Read-write operation can be obtained through multi-bit decoding, such that the probability of misoperation caused by interferences can be reduced. Read-write mark bits and data fields in an existing communication method of a synchronous serial communication interface are vulnerable to electromagnetic interference, as a result, mutations will occur on the read-write mark bits and the data fields, and errors will be produced, while with the communication method of the invention adopted, the problem can be solved.

A communications apparatus having a bidirectional, fair multiple-access, synchronous serial communications protocol operational with a single clock and a single data signal, which single clock is adapted to provide a uni-directional clock signal to synchronize a remote end of the apparatus with the single clock.

When detecting a start bit, a start bit detection circuit 15a outputs a signal for starting the oscillating operation of a clock signal generation circuit 16. When latching an end code for indicating the end of serial communication, a latch circuit 21 outputs the end code to a decoder 26. The decoder 26 decodes the end code and outputs a signal for stopping the oscillating operation of the clock signal generation circuit 16. Thus, the power consumption of the clock signal generation circuit 16 can be reduced.

The invention discloses a data transmission protocol method. The data transmission protocol method is used for data transmission between a client and a host computer, and comprises: a step S1 of performing bit merging for original data to obtain a combined synchronous frame, wherein the size of the original data is M bytes, each byte has N bits, and the synchronous frame successively comprises a synchronous frame head, the frame number of asynchronous frames, data bits of the plurality of asynchronous frames and a synchronous frame end from beginning to end; a step S2 of transmitting the combined synchronous frame; a step S3 of receiving the combined synchronous frame; and a step S4 of performing bit decomposition for the asynchronous frame data in the combined synchronous frame to recoverthe original data. Through adoption of the data transmission protocol method of the invention, defects that synchronous serial communication is high in efficiency but short in communication distanceand asynchronous serial communication is long in transmission distance but low in efficiency can be avoided, different asynchronous frame bits are selected, a bit stream can be obtained through automatic merging when data is transmitted, and data bytes can be obtained through automatic decomposition when the data is received; therefore, transmission efficiency is improved in the case of ensuring reliable long-distance transmission.

The invention discloses a speed and mileage measuring instrument based on a single-chip microcomputer. The speed and mileage measuring instrument comprises the single-chip microcomputer, a power source, a button, a synchronous serial communication module, a display device and a Hall sensor, the single-chip microcomputer is respectively connected with the power source, the button, the synchronous serial communication module and the Hall sensor, the display device is in communication connection with the single-chip microcomputer through the synchronous serial communication module, and the Hall sensor is arranged on a corresponding frame on a wheel and is used for detecting the number of revolutions of the wheel. The speed and mileage measuring instrument has the advantages of being cheap in adopted material, low development cost, capable of independently forming a system, capable of being directly integrated on a bicycle, an electric bicycle and other vehicles to be used, simple in circuit, and easy to use and popularize within a large range.

The invention discloses a high-speed asynchronous serial communication method. The method comprises the following processing steps of: inputting a high-speed serial signal, performing over-sampling on the input serial signal, sending the sampled data to a data determination recovery module, detecting whether data redundancy or missing exists in the currently input sampled data through the data determination recovery module according to a phase relationship between former output data and clocks, performing operation of redundant data removal, missed data recovery or normal data determination, updating a phase relationship between current output data and clocks, inputting the determined valid data to a data alignment and series-parallel conversion operation module for performing the data frame format alignment operation according to a data communication protocol, and outputting the valid data. Circuit modules related to the method comprise a data sampling module, the data determination recovery module and the data alignment and series parallel conversion operation module. The method belongs to the field of communication; and through adoption of the method, the data sampling error rate caused by clock or signal jittering in a high-speed serial transmission communication system is reduced, the implementation method is simple and the system is reliable.