A multi-chip three-dimensional hybrid packaging structure and its preparation method

Abstract

The invention discloses a multi-chip three-dimensional hybrid packaging structure and a preparation method thereof, which are mainly composed of a lower chip, chip bumps, a lower plastic package, a circuit layer, adhesive glue, an upper chip, welding wires, an upper plastic package and electrodes; The lower plastic package encapsulates the lower chip, the lower chip faces upwards, and the chip bumps on the lower chip expose the surface of the lower plastic package; the wiring on the surface of the lower plastic package forms a circuit layer, and the wiring area of ​​the circuit layer passes through the adhesive sheet The upper chip is glued, and the bonding wire connects the upper chip and the circuit layer. The upper plastic package encapsulates the upper chip, the circuit layer and the bonding wire; the lower plastic package has a through hole, and the upper part of the through hole is the electrode metal of the circuit layer, and the through hole is filled. There are metals that form the electrodes. The invention has the advantages of simple process, high package integration and high reliability, and the structure of the upper and lower plastic packages can effectively improve product warping and greatly improve the surface mounting yield.

Description

technical field [0001] The invention relates to the field of integrated circuit packaging, in particular to a multi-chip three-dimensional hybrid packaging structure and a preparation method thereof. Background technique [0002] With the increasing integration of IC packaging, multi-chip hybrid packaging is one of the main ways to increase the density of IC packaging. At present, the mainstream FC+WB and POP packages, due to the mismatch of the thermal expansion coefficients of the molding compound, the resin substrate, and the chip, will have the problems of warpage and insufficient reliability of the package. Contents of the invention [0003] For the problems existing in the above-mentioned prior art, the present invention provides a multi-chip three-dimensional hybrid packaging structure and a preparation method thereof, which includes a plastic package body and an intermediate circuit layer that are plastic-sealed twice up and down, and realizes multi-chip three-dime...

AI Technical Summary

Problems solved by technology

The current mainstream FC+WB and POP packages, due to the mismatch of the thermal expansion coefficients of the molding compound, the resin substrate, and the chip, will have the problems of warpage and insufficient reliability of the package.

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