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Semiconductor device

A semiconductor and electrode technology, used in semiconductor devices, electrical components, circuits, etc.

Inactive Publication Date: 2015-09-16
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, HFET also has a high concentration of electrons under the gate electrode due to the generation of electrons through polarization

Method used

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  • Semiconductor device
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Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0027] The semiconductor device of this embodiment includes: a first semiconductor layer made of Al X Ga 1-X N (0≤XY Ga 1-Y N (0Z Ga 1-Z N (0≤ZU Ga 1-U N (0≤UU Ga 1-U N(0≤U<1) is the material.

[0028] figure 1 It is a schematic cross-sectional view of the semiconductor device of this embodiment. The semiconductor device of this embodiment is an HFET.

[0029] Such as figure 1 As shown, a barrier layer (second semiconductor layer) 12 is provided on a channel layer (first semiconductor layer) 10 . In addition, a source electrode (first electrode) 14 and a drain electrode (second electrode) 16 are provided on the barrier layer (second semiconductor layer) 12 .

[0030] In addition, a p-type cap layer (third semiconductor layer) 18 is provided between the source electrode 14 and the drain electrode 16 on the barrier layer 12 . The p-type capping layer 18 is disposed away from the source electrode 14 and the drain electrode 16 . That is, the p-type cap layer 18 is neith...

no. 2 Embodiment approach

[0072] The semiconductor device of this embodiment includes: a first semiconductor layer made of Al X Ga 1-X N (0≤XY Ga 1-Y N (0Z Ga 1-Z N(0≤ZU Ga 1-UN (0≤UU Ga 1-U N(0≤U<1) is the material.

[0073] The semiconductor device of this embodiment is different from the first embodiment in that the first groove and the second groove are provided in the third semiconductor layer, and that the first electrode and the fourth semiconductor layer, and the second electrode and the fifth semiconductor layer are not necessarily separated from each other. different ways. Hereinafter, the description of the contents overlapping with the first embodiment will be omitted.

[0074] Figure 6 It is a schematic cross-sectional view of the semiconductor device of this embodiment. The semiconductor device of this embodiment is an HFET.

[0075] Such as Figure 6 As shown, the p-type cap layer (third semiconductor layer) 18 is provided with a first groove 30 and a second groove 32 . Furth...

no. 3 Embodiment approach

[0088] The semiconductor device of this embodiment differs from the first modified example of the second embodiment in that the first electrode is electrically connected to the third semiconductor layer between the second groove and the second electrode. Hereinafter, the description of the contents overlapping with the second embodiment will be omitted.

[0089] Figure 9 It is a schematic cross-sectional view of the semiconductor device of this embodiment. The semiconductor device of this embodiment is an HFET.

[0090] Such as Figure 9 As shown, the source electrode (first electrode) 14 is electrically connected to the p-type cap layer (third semiconductor layer) 18 between the second groove 32 and the drain electrode (second electrode) 16 . Specifically, for example, a strip-shaped electrode 36 is further provided on the p-type cap layer 18 to electrically connect the electrode 36 to the source electrode 14 .

[0091] According to the present embodiment, by connecting ...

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Abstract

A semiconductor device of this embodiment includes: a first semiconductor layer including AlXGa1-XN; a second semiconductor layer provided above the first semiconductor layer, and including undoped or n-type AlYGa1-YN; a first and second electrodes provided above the second semiconductor layer; a third semiconductor layer provided above the second semiconductor layer between the first electrode and the second electrode, is at a distance from each of the first and second electrodes, and including p-type AlZGa1-ZN; a control electrode provided above the third semiconductor layer; a fourth semiconductor layer provided above the third semiconductor layer between the first electrode and the control electrode, is at a distance from the control electrode, and including n-type AlUGa1-UN; and a fifth semiconductor layer provided above a portion of the third semiconductor layer between the control electrode and the second electrode, is at a distance from the control electrode, and including n-type AlUGa1-UN.

Description

[0001] [Related applications] [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2014-47694 (filing date: March 11, 2014). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments of the present invention relate to a semiconductor device. Background technique [0004] Power semiconductor elements such as switching elements and diodes are used in circuits such as switching power supplies and inverters. These power semiconductor elements are required to have high withstand voltage and low on-resistance. In addition, the relationship between withstand voltage and on-resistance has a trade-off relationship determined by the material of the device. [0005] Through the advancement of technological development so far, power semiconductor elements have achieved low on-resistance close to the limit of silicon, which is the main...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/778H01L29/205H01L29/36
CPCH01L29/205H01L29/7787H01L29/2003H01L29/1066H01L29/0657H01L29/402H01L29/41766H01L29/423H01L29/42316H01L29/7786
Inventor 斋藤涉齐藤泰伸
Owner KK TOSHIBA