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Management method of flash memory and bad blocks

A technology of flash memory and management method, applied in the field of bad block management

Active Publication Date: 2015-11-04
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0014] The object of the present invention is to provide a kind of flash memory that solves the problem of existing bad block management method, the management method of bad block and management program

Method used

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  • Management method of flash memory and bad blocks
  • Management method of flash memory and bad blocks
  • Management method of flash memory and bad blocks

Examples

Experimental program
Comparison scheme
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Embodiment

[0070] Figure 4 It is a block diagram showing the structure of the flash memory of the embodiment of the present invention. However, the configuration of the flash memory shown here is an example, and the present invention is not necessarily limited to this configuration.

[0071] The flash memory 100 of the present embodiment is constituted to include: a memory array 110 forming a plurality of memory cells arranged in a matrix; an input-output buffer (buffer) 120 connected to an external input-output terminal I / O and holding input-output data ; Address register (address register) 130, receives the address data from I / O buffer 120; Data register 140, keeps the data of input and output; Controller 150, based on command data and external control signal from I / O buffer 120 The illustrated chip enable (chip enable) or address latch enable (address latch enable), etc.), and supply control signal C1, control signal C2, control signal C3, etc. to control each part; look-up table (L...

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PUM

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Abstract

The invention discloses a management method of a flash memory and bad blocks. The flash memory comprises a memory array 110, a management memory 154, a first judgment part, a second judgment part and a look-up table 152, wherein the memory array 110 comprises multiple blocks; the management memory 154 is used for storing states in which the memory array 110 is programmed and erased; the first judgment part is used for judging whether the bad blocks exist in the memory array or not on the basis of the states; the second judgment part is used for judging whether part in the bad blocks are bad pages or not when it is judged that the bad blocks exist; when it is judged that part in the bad blocks are the bad pages, the look-up table stores address conversion information used for converting the bad blocks and the pages in the bad blocks.

Description

technical field [0001] The invention relates to a Not AND (NAND) type flash memory (flash memory), in particular to a method for managing bad blocks. Background technique [0002] Defective elements generated at the manufacturing stage of the flash memory are rescued by replacing them with memory elements of redundant regions using a redundant scheme. On the other hand, even a memory element judged to be normal at the shipping stage may become defective due to repeated programming or erasing. That is, there are memory elements in which the threshold value (threshold value) of the memory element cannot be converged within a desired distribution range even if a fixed number of program pulses are applied, and the memory element cannot be brought into the same range even if a fixed number of erase pulses are applied. The thresholds of the memory elements converge within the desired distribution range. In the flash memory, the following so-called bad block management is adopted...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/06G11C16/14G11C29/08
Inventor 青木实
Owner WINBOND ELECTRONICS CORP