Memory architecture with wiring structure enabling different access patterns in multiple dimensions

Abstract

A multidimensional memory architecture is provided that has an access wiring structure that enables different access patterns in multiple dimensions. Furthermore, a three-dimensional multiprocessor system is provided that includes a multi-dimensional cache memory architecture with an access wiring structure enabling different access patterns in multiple dimensions.

Description

[0001] cross reference [0002] This application claims priority to US Patent Application No. 13 / 927,846, filed June 26, 2013, the disclosure of which is incorporated herein by reference. technical field [0003] The technical field of the invention relates generally to multidimensional memory architectures having access wiring structures that enable different access modes in multiple dimensions, and to three-dimensional (3-D) multiprocessor systems that The system has a multi-dimensional cache memory architecture with an access wiring structure enabling different access patterns in multiple dimensions. Background technique [0004] In the field of semiconductor processor chip manufacturing, in the early stages of processor technology, many companies manufactured single-chip processors. Over the past decade or so, as Moore's Law has continued to shrink dimensions, many companies and other entities have begun designing processor chips with multiple processors on one layer. ...

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Also, as the operating frequency increases, the cycle-by-cycle latency associated with communicating between processors increases

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