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Semiconductor device with enhancement mode and depletion mode finfet cells

A semiconductor, depletion-type technology, applied in the direction of semiconductor devices, electrical solid-state devices, electrical components, etc., can solve problems such as limitation and area application

Inactive Publication Date: 2018-07-13
INFINEON TECH DRESDEN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Considering the channel width, gate electrode, drift region, and contacts, lateral current flow imposes area constraints

Method used

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  • Semiconductor device with enhancement mode and depletion mode finfet cells
  • Semiconductor device with enhancement mode and depletion mode finfet cells
  • Semiconductor device with enhancement mode and depletion mode finfet cells

Examples

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Embodiment Construction

[0017] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustrations specific embodiments in which the invention may be practiced. It is also to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. For example, features illustrated or described for one embodiment can be used on or in combination with other embodiments to yield still other embodiments. It is intended that the present invention cover such modifications and variations. The various examples have been described using specific language, which should not be construed as limiting the scope of the appending claims. The drawings are not drawn to scale and are for illustration purposes only. For purposes of clarity, the same elements have been identified by corresponding reference signs in the different drawings, if not...

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PUM

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Abstract

The present invention relates to semiconductor devices with enhancement mode and depletion mode FinFET cells. A semiconductor device includes: an enhancement FinFET unit and a depletion FinFET unit. The enhanced FinFET unit includes a first gate structure separating a first semiconductor fin. The depletion mode FinFET cell includes a second gate structure separating a second semiconductor fin. Between the first and second gate structures, a connection structure separates the first semiconductor fin from the second semiconductor fin. The connection structure has a higher specific conductance than that in the second semiconductor fin.

Description

technical field [0001] The present invention relates to semiconductor devices, and in particular to semiconductor devices having enhancement mode and depletion mode FinFET cells. Background technique [0002] Power semiconductor devices such as power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) suffer from high breakdown voltage in blocking mode and have low on-state resistance in conducting mode. In a lateral power MOSFET, the load current flows in a lateral direction parallel to the main surface of the semiconductor die. Considering the channel width, gate electrode, drift region, and contacts, lateral current flow imposes area constraints. The lateral power FinFET (Fin Field Effect Transistor) reduces the on-state resistance by increasing the channel width in the vertical direction. It is desirable to provide lateral power semiconductor devices with improved electrical characteristics. Contents of the invention [0003] According to one embodiment, a ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/088
CPCH01L27/0883H01L27/0629H01L27/0886
Inventor R·威斯
Owner INFINEON TECH DRESDEN