Adaptive process for data sharing with selection of lock elision and locking
A hardware lock omission and address lock technology, which is used in electrical digital data processing, concurrent instruction execution, machine execution devices, etc.
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[0018] Historically, computer systems or processors have only had a single processor (aka processing unit or central processing unit). The processor includes an instruction processing unit (IPU), a branch unit, and a memory control unit. This processor is capable of executing a single thread of a program at a time. Operating systems were developed that could time share servers by allocating a program to execute on a processor for one period of time, and then allocating another program to execute on a processor for another period of time. As technology evolves, memory subsystem caches are often added to processors as well as complex dynamic address translations including translation lookaside buffers (TLBs). The IPU itself is often referred to as a processor. As technology continues to develop, an entire processor can be packaged as a single semiconductor chip or die, known as a microprocessor. Then, a processor incorporating multiple IPUs was developed, which is also often ...
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