Vertical memory devices and related methods of manufacture

Abstract

The invention discloses vertical memory devices and related methods of manufacture, the vertical semiconductor memory device has conducting and charge-trapping columns separated by columns of holes. The columns are formed in layers of alternating conducting and insulating material with the conducting / charge-trapping columns and columns of holes separating layers of conducting material into disjoint strips. The conducting columns and separated layers of conducting material form wordlines and bitlines in the device.

Description

technical field [0001] The present invention relates to a memory device and its manufacturing method, and in particular, relates to a vertical memory device and its manufacturing method. Background technique [0002] As the density of semiconductor memory devices increases, two-dimensional structures can no longer meet certain requirements. Thus, although the manufacturing process of 3D memory faces special problems, 3D memory has become well known. figure 1 An embodiment of a semiconductor device 100 having a three-dimensional stacked structure with bending and wiggling line boundaries created by line patterns is shown. These fabrication difficulties are especially severe at high aspect ratios. For example, along figure 1 The vertical elements of cross-section A-A', such as line isolation structures 105, may show isolation of spaces 110 filled with conductive and / or other materials. However, as shown in section B-B', the effects of bending and wobble are significant. M...

AI Technical Summary

Problems solved by technology

Such fabrication issues complicate the fabrication of three-dimensional memory devices with multiple cells of sufficiently small size

[0003] There is a need to avoid stringer and bow / wobble issues present in prior art memory cell processes

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