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cache replacement algorithm

A technology for replacing algorithm and count value, applied in the field of memory, can solve the problem of counter count bit width, etc., and achieve the effect of no performance loss, reduced resource consumption, and simple hardware implementation.

Active Publication Date: 2019-03-19
兆讯恒达科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the data usage frequency of the traditional LRU algorithm is counted upwards, the counter counting bit width is relatively large, and an additional mechanism is needed to deal with counting overflow.

Method used

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Embodiment Construction

[0021] The present invention will be further described in detail below in conjunction with the accompanying drawings, so that those skilled in the art can implement it with reference to the description.

[0022] It should be noted that the experimental methods described in the following embodiments, unless otherwise specified, are conventional methods, and the reagents and materials, if not otherwise specified, can be obtained from commercial sources; in the description of the present invention, The terms "landscape", "portrait", "top", "bottom", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", The orientation or positional relationship indicated by "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the referred device or element must have Certain orientations, co...

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Abstract

The invention discloses a Cache replacement algorithm suitable for a Cache structure and a memorizer which adopt a set-associative mapping or fully-associative mapping relation. The Cache structure is provided with a plurality of ways used for storing data of the memorizer, and adopts a countdown method for summarizing the most recently used frequency of each way in the Cache structure, and when the needed data of the memorizer does not exist in the Cache structure, the memorizer data in the way counted as 0 is replaced with new data. The Cache replacement algorithm can reduce 40% of hardware consumption, and acquires the same Cache hit rate.

Description

technical field [0001] The present invention relates to the field of memory. More specifically, the present invention relates to a Cache replacement algorithm that counts down the number of times data is used in the Cache structure by counting down. Background technique [0002] Cache is a mechanism based on the principle of program locality to cache part of data through small-capacity and fast-speed memory to reduce the number of processor accesses to slow-speed large-capacity memory, thereby improving the efficiency of processor instruction fetching. The Cache replacement algorithm means that when a Cache miss occurs, the Cache selects an address in the cache according to a certain mechanism for data update. The Cache replacement algorithm has a great impact on the Cache hit rate. The current mainstream Cache replacement algorithms include pseudo-random, first-in-first-out (FIFO—First In First Out), and least recently used (LRU—Least Recently Used). Compared with the ps...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/123
CPCG06F12/123
Inventor 李凌浩范振伟李立
Owner 兆讯恒达科技股份有限公司