Method for identifying IEC61850 key logical node
A technology of logical nodes and identification methods, which is applied in the field of identification of key logical nodes of IEC61850, and can solve problems such as the lack of research on key logical nodes in smart substations
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specific Embodiment 1
[0047] The IEC61850 key logic node identification method includes the following steps:
[0048] Step 1. According to the logical node and communication information piece (Piece of Information for Communication, PICOM) transmission list defined by IEC61850-5, list the logical node and PICOM transmission list actually contained in the target substation;
[0049] Step 2: abstract each transmission link in the list into a transmission path of a directed network in turn to form a logical connection network of logical nodes. Among them, the logical node represents the node of the network, the PICOM transmission link between the logical nodes represents the edge of the network, and the transmission direction represents the direction of the edge;
[0050] Step 3. Assign a certain weight w to each PICOM transmission link of the logical connection network according to the signal type of each logical node;
[0051] Step 4. Merge the repeated edges and nodes of the network, and the weigh...
specific Embodiment 2
[0058] The IEC61850 key logic node identification method includes the following steps:
[0059] Step 1. According to the logical node and communication information sheet (Piece of Information for Communication, PICOM) transmission list defined by IEC61850-5, list the partial logical node PICOM transmission list contained in a substation of the present embodiment, such as figure 2 shown.
[0060] Step 2: abstract each transmission link in the list into a transmission path of a directed network in turn to form a logical connection network of logical nodes. Among them, the logical nodes represent the nodes of the network, the PICOM transmission link between the logical nodes represents the edge of the network, and the transmission direction represents the direction of the edge. This embodiment includes 2 source logical nodes PZSU and PDIS, wherein, PZSU includes 3 effective logical connection links, and PDIS includes 3 effective logical connection links. According to the trans...
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