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Semiconductor assembly having bridge module for die-to-die interconnection

A technology of semiconductors and wafers, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as increasing costs

Active Publication Date: 2017-11-28
XILINX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, using a 2.5D architecture for SiP packaging would significantly increase the cost because a separate interposer would have to be designed, fabricated, and tested

Method used

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  • Semiconductor assembly having bridge module for die-to-die interconnection
  • Semiconductor assembly having bridge module for die-to-die interconnection
  • Semiconductor assembly having bridge module for die-to-die interconnection

Examples

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Embodiment Construction

[0035] Various features are described below with reference to the drawings. It should be noted that the drawings may or may not be drawn to scale and that elements of similar structure or function are denoted by the same reference numerals in the drawings. It should be noted that the drawings are only intended to facilitate the description of the features. They are not intended as an exhaustive description of the claimed invention, or as a limitation on the scope of the claimed invention. In addition, the illustrated embodiments do not necessarily have all aspects or advantages realized. An aspect or advantage described in connection with a particular embodiment is not necessarily limited to that embodiment, and can be practiced in any other embodiment, even if not so shown, or not so clearly described.

[0036] Techniques for providing semiconductor assemblies with bridge modules for wafer-to-wafer interconnection are described. In one example, a semiconductor package incl...

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PUM

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Abstract

In one example, a semiconductor assembly comprises a first IC die (104A), a second IC die (104B), and a bridge module (110). The first IC die includes, on a top side thereof, first interconnects (108A) of a plurality of interconnects (108) and first inter-die contacts (608A) of a plurality of inter-die contacts (608). The second IC die includes, on a top side thereof, second interconnects (108B) of the plurality of interconnects and second inter-die contacts (608B) of the plurality of inter-die contracts. The bridge module is disposed between the first interconnects and the second interconnects and includes bridge interconnects (112) on a top side thereof, the bridge interconnects mechanically and electrically coupled to the plurality of inter-die contacts, and layer(s) of conductive interconnect (706) disposed on the top side thereof to route signals between the first IC and the second IC. A back side (710) of the bridge module does not extend beyond a height of the plurality of interconnects.

Description

technical field [0001] Examples of the present disclosure relate generally to semiconductor devices, and in particular to semiconductor assemblies having bridge modules for die-to-die interconnection. Background technique [0002] Integrated circuit (IC) architectures have evolved to incorporate many different functions in a single package, where each function is performed by a separate IC die or chip scale package (CSP). Such an architecture is sometimes referred to as a system-in-package (SiP). One type of SiP structure involves mounting multiple IC dies to an interposer, which is in turn mounted to a packaging substrate. The interposer includes through wafer vias (TDVs), also known as through silicon vias (TSVs), which connect metallization layers on the upper and lower surfaces of the interposer. Metallization layers are used to carry electrical signals between the plurality of IC dies and between each IC die of the plurality of IC dies and the packaging substrate. Th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/56H01L21/60H01L25/00H01L25/065H01L25/07
CPCH01L21/568H01L24/11H01L24/81H01L25/0655H01L25/072H01L25/50H01L2224/11003H01L2224/16145H01L2224/1703H01L2224/73204H01L2224/81191H01L2224/81192H01L2224/81005H01L2224/92125H01L2224/83005H01L2924/14H01L2924/15311H01L2924/18161H01L23/49816H01L23/5383H01L23/3128H01L2224/32106H01L2224/32137H01L2224/32105H01L23/5381H01L24/13H01L24/16H01L24/17H01L24/29H01L24/32H01L24/83H01L24/92H01L2224/131H01L2224/16227H01L2224/2919H01L2224/32145H01L2224/32225H01L2224/8182H01L2224/81203H01L2224/13144H01L2224/13124H01L2224/13147H01L2224/16225H01L2924/15151H01L2224/96H01L25/0652H01L2924/15192H01L2924/351H01L2224/1403H01L2924/014H01L2924/00014H01L2924/0665H01L2924/00H01L21/56H01L23/488
Inventor W·S·权S·瑞玛林嘉
Owner XILINX INC