FPGA parallel acceleration method based on convolution neural network (CNN)

A convolutional neural network and network technology, applied in the field of FPGA parallel acceleration of convolutional neural networks, can solve the problems of not fully exerting the FPGA computing potential and poor scalability.

Inactive Publication Date: 2017-12-12
NAT COMP NETWORK & INFORMATION SECURITY MANAGEMENT CENT
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  • Application Information

AI Technical Summary

Problems solved by technology

Previously, some scholars have implemented CNN with different structures on FPGA to do simple real-time image recogni

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  • FPGA parallel acceleration method based on convolution neural network (CNN)
  • FPGA parallel acceleration method based on convolution neural network (CNN)
  • FPGA parallel acceleration method based on convolution neural network (CNN)

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Embodiment Construction

[0012] Below, in conjunction with accompanying drawing, the present invention is described in detail as follows:

[0013] The FPGA parallel acceleration method of a convolutional neural network of the present invention comprises the following points:

[0014] One is the CNN model structure. The CNN model structure adopted in the present invention is made up of 1 input layer input, 1 output layer output, 2 convolution layers, 2 pooling and a fully connected network Softmax, such as figure 1 shown. In this experiment, the input image set is the handwritten digital image set MNIST. The size of each image is 28×28 pixels. The specific network structure is as follows:

[0015] Input layer: 28×28;

[0016] C1Conv layer: 3kernels, each with size 5×5, stride=1;

[0017] S1Max-pooling layer: each with size 2×2, stride=2, β=1.0 b=0.0;

[0018] C2Conv layer: 6kernels, each with size 5×5, stride=1;

[0019] S2Max-pooling layer: each with size 2×2, stride=2, β=1.0 b=0.0;

[0020] ...

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Abstract

The invention discloses an FPGA parallel acceleration method based on a convolution neural network (CNN), and the method comprises the following steps: (1), building a CNN model; (2), configuring a hardware architecture; (3), configuring a convolution operation unit. The beneficial effects of the invention lies in that the method employs the FPGA for implementing the CNN, increases the speed of CNN calculation, compared with a GPU, relative to a handwriting image dataset MNIST by nearly five times through designing an optimization hardware acceleration scheme, and achieves the 10-time acceleration when compared with a 12-core CPU; the power consumption is one third of the power consumption of the CPU.

Description

technical field [0001] The invention relates to the field of computer computing, in particular to a FPGA parallel acceleration method of a convolutional neural network. Background technique [0002] Convolutional Neural Network (Convolutional Neutral Network) is a kind of artificial neural network. CNN is the first learning algorithm to truly successfully train a multi-layer network structure. It uses the spatial relationship and adopts the weight sharing network structure to make it more similar to the biological neural network, which reduces the complexity of the network model and reduces the number of weights to improve the training performance of the general forward BP algorithm. This advantage is more obvious when the input of the network is a multi-dimensional image. On the other hand, in CNN, the image can be directly used as the bottom layer input of the network, and the information is then transmitted to different layers in turn. Each layer passes a digital filter...

Claims

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Application Information

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IPC IPC(8): G06N3/063
CPCG06N3/065
Inventor 徐杰包秀国陈训逊王博王东安
Owner NAT COMP NETWORK & INFORMATION SECURITY MANAGEMENT CENT
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