Floating point peak value calculation throughput test algorithm based on INTEL AVX instruction set

Abstract

The invention discloses a floating point peak value calculation throughput test algorithm based on an INTEL AVX instruction set. The method comprises following steps: step 1: AVX 128Bit ADD / Sub; step2: AVX 128bit Mul; step 3: AVX 128Bit FMA; step 4: AVX 128Bit ADD+mul; step 5: AVX 256Bit ADD / Sub; step 6: AVX 256Bit Mul; step 7: AVX 256Bit FMA; step 8: AVX 256Bit ADD+Mul; step 9: AVX 512Bit ADD / Sub; step 10: AVX 512Bit Mul; step 11: AVX 512Bit Bit ADD+Mul; step 12: AVX 512Bit Bit FMA; step 13: automatic iteration and nanosecond timing of the calculation process; step 14: for different processor configurations; step 15: single-threaded testing+ multi-threaded calling; step 16: displaying test results. According to the invention, in the shortest possible test time, the vector computing powerof the current mainstream X86 processors can be evaluated to help researchers quickly determine the architecture of the architecture processor in SIMD throughput, and find the focus and performance peak point of its basic computing power.

Description

technical field [0001] The invention relates to the field of floating-point algorithms, in particular to a floating-point peak calculation throughput test algorithm based on the INTEL AVX instruction set. Background technique [0002] In the past, mainstream CPUs increased the computing power of the CPU per unit time by increasing the number of instruction executions per second. Usually, one instruction was executed per clock cycle to complete a calculation. However, as the complexity of calculations increased, the CPU introduced pipeline execution. The method is to divide a complete instruction execution step into multiple steps, and each register is completed in the form of a pipeline. Each clock cycle also completes an operation. As long as the pipeline can run stably, it can still be approximately one clock cycle. There is one instruction to complete, and this form of completing one instruction in one clock cycle is also called a scalar processor. [0003] However, as t...

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Problems solved by technology

[0004] Neither scalar nor superscalar processors solve a problem, that is, one calculation instruction is still used to realize a numerical calculation, but as the simple increase of execution units has a greater impact on power consumption and heat generation, the calculation performance of the CPU has developed into There are two ideas of multi-threaded concurrency and SIMD parallelism. Multi-threading still does not change the execution at the instruction level, but still increases the number of instruction executions per unit time, while SIMD changes the basic idea of ​​​​instruction execution in the past and introduces vector (vector) computing. the concept of

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