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Handling thin wafer during chip manufacture

A technique for wafers, electronic chips, used in the field of handling thin wafers during chip manufacturing

Inactive Publication Date: 2018-08-21
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, there is still potential room to reduce manufacturing costs and simplify the processing of electronic chips while maintaining high processing accuracy
In addition, handling increasingly thinner wafers and electronic chips is becoming more and more challenging

Method used

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  • Handling thin wafer during chip manufacture
  • Handling thin wafer during chip manufacture
  • Handling thin wafer during chip manufacture

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0052] The illustrations in the figures are schematic.

[0053] Before describing further exemplary embodiments in more detail, some fundamental considerations of the inventors upon which exemplary embodiments have been developed that provide for the fabrication of electronic chips capable of handling very thin wafers and electronic chips will be summarized. concept.

[0054] According to an exemplary embodiment of the present invention, a process flow for fabricating a semiconductor device from a modified wafer-level bonding architecture is provided. More specifically, exemplary embodiments provide a semiconductor package having a small thickness of its semiconductor material (especially silicon material) as a package body. In particular, such a manufacturing architecture is particularly advantageous for chip-scale packaging concepts.

[0055] In conventional approaches, the chip scale package manufacturing process requires a certain minimum thickness of the wafer so that t...

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PUM

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Abstract

The invention relates to the field of handling a thin wafer during the chip manufacture. A manufacturing method is provided which comprises forming recesses (112) in a front side (102) of a wafer (100), connecting a first temporary holding body (104) to the front side of the recessed wafer (100), thereafter thinning the wafer from a back side, connecting a second temporary holding body (110) to the back side (106), and thereafter removing the first temporary holding body (104).

Description

technical field [0001] The present invention relates to manufacturing methods, intermediate products, semiconductor devices and electronic devices. Background technique [0002] Conventional packaging, such as die structures, for electronic chips has evolved to a level where the packaging no longer significantly hinders the performance of the electronic chip. Furthermore, processing electronic chips on a wafer level is a known process for producing them efficiently. Etching electronic chips is a conventional technique for removing material therefrom. Encapsulating electronic chips during package manufacturing protects them from the environment. [0003] In another technique, non-encapsulated semiconductor devices are used in which a redistribution layer is formed along with solder structures on a semiconductor body with integrated circuits therein. [0004] However, there is still potential room for reducing manufacturing costs and simplifying the processing of electronic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/683H01L21/768H01L23/538
CPCH01L21/6835H01L21/76895H01L23/5386H01L2221/68368H01L2221/68327H01L2221/6834H01L2221/68381H01L24/05H01L24/13H01L2224/94H01L2224/024H01L2224/05099H01L2224/0239H01L2224/0401H01L2224/05548H01L2224/11334H01L2224/13007H01L2224/13021H01L2224/13024H01L2224/131H01L2224/16221H01L2224/16238H01L2224/81097H01L2924/1304H01L24/11H01L24/94H01L21/78H01L23/544H01L2224/11H01L2924/00014H01L2924/014H01L24/14H01L2224/023H01L21/6836H01L21/3065
Inventor M.布伦鲍尔M.彦克T.基勒A.科勒G.迈尔A.米勒-希佩尔A.施蒂克于尔根C.托姆斯
Owner INFINEON TECH AG