Method and system for automatically correcting digital BPM sampling data multi-channel phase

Abstract

The invention discloses a method and system for automatically correcting digital BPM sampling data multi-channel phase. The method comprises the following steps: a sine wave signal produced by a signal generator produces N paths of sampling signals through a power divider, the N paths of sampling signals are respectively sent to an AFE through a transmission cable; a clock signal is divided into Npaths of clock signals through the PLL phase lock, the N paths of clock signal are respectively sent to the corresponding sampling ends after phase shifting through a delay device, thereby triggeringa sampling operation; and the sampling data is sent to a FPGA; the FPGA controls the delay device and sampling device to perform sub-step phase shift and scanning sampling operation within 1/4 periodof each path of clock signal, and performs integral processing on the sampling data at each sampling point location; if the maximum phase difference all signals in the signals at the same sampling moment is not greater than 1/4 period of the signal, the system computes the phase difference according to a scanning sampling result, and different channel clock phases are adjusted so that the sampling integral values of various channels at the clock setting phase are basically equal.

Description

technical field [0001] The invention relates to a method and system for automatically correcting multi-channel phases of DBPM (digital BPM) sampling data, and belongs to the technical field of particle accelerators. Background technique [0002] The digital BPM system processes and calculates the beam signal detected by the beam probe (such as the Button electrode) in the particle accelerator to obtain the beam position information, among which, the four button electrodes of the BPM respectively sense the beam position information at the same time , AFE (Analog Frontend Electronics, analog front-end electronics) performs filtering, signal conditioning and other processing on the detection signal and then transmits the signal to the ADC (Analog Digital Converter, analog-to-digital converter) of the DFE (Digital Frontend Electronics, digital front-end electronics) board :) The sampling end; the digital front-end electronics DFE performs data processing and position calculation...

AI Technical Summary

Problems solved by technology

[0016] 1. The adjustable delay clock device has corresponding mature products that can be used, which can well solve the problem of different phases of ADC sampling data caused by different processing delay times of different channels;

Images