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A gate scanning drive circuit

A driving circuit and gate scanning technology, applied in static indicators, instruments, etc., can solve problems such as instability, reduced circuit reliability, and poor functionality, and achieve the effect of narrowing the border and avoiding circuit failure

Active Publication Date: 2020-08-04
NANJING CEC PANDA LCD TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This instability is also related to the device itself, and there will be obvious poor functionality in the application of oxide thin film transistors
This negative drift can also lead to poor functionality of the circuit when switching scan directions
[0007] On the other hand, by adding additional forward scan control signal U2D, reverse scan control signal D2U and single-side gate scan drive circuit using two start signals GSP1 and GSP3 to realize the forward and reverse scan function reduces the reliability of the circuit , also increases the complexity of the circuit

Method used

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  • A gate scanning drive circuit
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  • A gate scanning drive circuit

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0096] Such as Figure 7 Shown is a circuit diagram of Embodiment 1 of a gate scanning drive circuit. The nth level drive circuit unit includes a positive and negative scan control module 01, a pull-up module 02, a touch auxiliary module 03, a maintenance auxiliary module 04, and a memory compensation module 05 and the first capacitor C1. The positive and negative scan control module 01, the pull-up module 02, the maintenance auxiliary module 04 and the memory compensation module 05 are connected to the pull-up control node netAn; Lower the level VSS; the pull-up module 02 and the touch auxiliary module 03 are connected to the gate scanning signal line of the current stage, and the gate scanning signal line outputs the gate scanning signal Gn; the first capacitor C1 is connected to the pull-up control node netAn and Between the gate scanning signal lines of this stage.

[0097] Such as Figure 7 As shown, specifically, the pull-down sub-module 05A of the nth-level drive cir...

Embodiment 2

[0133] Figure 9 It is a schematic circuit diagram of Embodiment 2 of a gate scanning driving circuit of the present invention. The second embodiment is improved on the basis of the first embodiment, and the specific improvements are as follows:

[0134] 1. The memory compensation module 05 of the nth level drive circuit unit also includes a sixteenth thin film transistor M9B, the control terminal of the sixteenth thin film transistor M9B inputs the second clock signal CKm+4, and the two channels of the sixteenth thin film transistor M9B The terminals are respectively connected to the pull-up control node netAn and the input constant-voltage low-level VSS; the sixteenth thin film transistor M9B is responsible for clearing and resetting the memory compensation node netCn in time to ensure that the memory compensation node netCn can maintain synchronization with the pull-up control node netAn;

[0135] 2. The control end of the fourth thin film transistor M4 in the memory compe...

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Abstract

The invention discloses a gate driver monolithic. The circuit comprises N stages of driving circuit units, wherein N is a positive integer greater than 4; the n stage driving circuit unit comprises a positive and negative scanning control module, a pull-up module, a touch assisting module, a maintenance assisting module and a memory compensation module, wherein n is a positive integer greaterthan or equal to 1 and smaller than or equal to N; the memory compensation modules comprise memory compensation nodes and are used for copying voltage information of pull-up control nodes and transmitting the voltage information to the memory compensation nodes in the early touch detection stage, pulling down the voltage of the pull-up control nodes from first-stage voltage to second-stage voltagein the touch detection stage and controlling the voltage of the pull-up control nodes to be pulled up to the first-stage voltage in the later touch detection stage. In the gate driver monolithic, thepull-up control nodes of all the stages in the touch detection stage are maintained at a low potential, and stop-pit horizontal stripes caused by different characteristic shifts of thin film transistors in the pull-up modules are eliminated.

Description

technical field [0001] The invention relates to the field of liquid crystal display, in particular to a grid scanning driving circuit for an embedded touch display screen. Background technique [0002] In recent years, the Gate Driver Monolithic (GDM) in the liquid crystal display has gradually been technically integrated into the liquid crystal panel by using the existing thin film transistor manufacturing process, which can not only reduce the manufacturing cost, but also improve the design Reduce left and right border sizes. In small-size display applications, in order to meet the requirements of different customer applications, the design of the gate scan driving circuit generally needs to be able to support forward scan and reverse scan switching functions. [0003] figure 1 Shown is a schematic circuit diagram of an existing gate scan drive circuit for an embedded touch display, the gate scan drive circuit includes a forward and reverse scan control module 01, a pull...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/36
CPCG09G3/3674
Inventor 戴超陈旭黄洪涛王志军
Owner NANJING CEC PANDA LCD TECH