Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A Silicon Wafer Primary Negative Pressure Diffusion Process

A diffusion process and silicon wafer technology, which is applied in the manufacture of electrical components, circuits, semiconductors/solid-state devices, etc., can solve the problems of cumbersome process manufacturing, diffusion of volatile phosphorus sources, and low diffusion efficiency, so as to improve diffusion efficiency and reduce back-to-source , The effect of simplifying the coating process

Active Publication Date: 2021-02-05
TIANJIN HUANXIN TECH DEV
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, most of the production of silicon wafers in the industry will use the diffusion process to form a PN junction. At present, the commonly used diffusion process in the industry generally uses one full diffusion of phosphorus paper source and boron paper source or two diffusion methods of phosphorus and boron. These diffusion methods have Unavoidable defects: 1) Since the gap between the silicon wafers increases after the paper source is sintered, the volatilized phosphorus source diffuses to the boron surface and causes return to the source; Sandblasting or chemical thinning is required on one side to remove the anti-source amount, and then boron diffusion is performed, which is costly, low in diffusion efficiency, and prone to fragmentation

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A Silicon Wafer Primary Negative Pressure Diffusion Process

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0026] Such as figure 1 As shown, the present invention relates to a silicon chip negative pressure diffusion process, comprising the following steps:

[0027] 1) Double-sided thinning of the silicon wafer: use an etching solution to etch the silicon wafer on both sides to remove the surface damage layer, specifically including the following steps:

[0028] A. Use a thermometer to measure the temperature of the etching solution. The temperature is generally 0-15°C, and set the etching time of the silicon wafer according to the temperature of the etching solution. The etching time is generally 9-50s. Determine the etching time according to the temperature of the etching solution. Place in the etching solution for etching and thinning, and determine the thickness of the single-sided thinning of the silicon wafer according to the temperature of t...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a negative pressure diffusion process for silicon wafers, which comprises the following steps: performing pre-diffusion treatment on double-sided thinned silicon wafers, printing diffusion sources on the treated silicon wafers, and using screen printing technology to process the treated silicon wafers One side of the silicon wafer is printed with a phosphorus diffusion source, and the other side is printed with a boron diffusion source or a boron-aluminum diffusion source; the sides of the same diffusion source of the silicon wafer are stacked and loaded into a boat; low-pressure diffusion is performed in a diffusion furnace and post-diffusion treatment is performed. The beneficial effect of the present invention is that the phosphorus diffusion source, the boron diffusion source or the boron aluminum diffusion source are respectively printed on both sides of the silicon wafer by the screen printing process, so that the coating process of the silicon wafer liquid source is simplified and the processing cycle is shortened; the liquid source After coating, a negative pressure diffusion process is adopted to reduce the source return at the edge of the silicon wafer, and the diffusion process steps are simplified to improve the diffusion efficiency; this process method is used to perform a single diffusion of the liquid source of the silicon wafer, so that the produced PN junction is uniform, making The processing cost of silicon wafer is reduced.

Description

technical field [0001] The invention belongs to the field of silicon wafer manufacturing technology, in particular to a silicon wafer primary negative pressure diffusion process. Background technique [0002] With the development of semiconductor technology, the requirements for passivation of semiconductor surfaces are getting higher and higher. As a passivation material, it should have good electrical properties, reliability, good chemical stability, operability and economy. According to the above requirements, special glass for semiconductor passivation has been applied in the semiconductor industry as an ideal semiconductor passivation material. Chips made of special glass for semiconductor passivation are called glass passivation process chips (GPP chips). [0003] At present, most of the production of silicon wafers in the industry will use the diffusion process to form a PN junction. At present, the commonly used diffusion process in the industry generally uses one f...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/228
CPCH01L21/228
Inventor 李亚哲王彦君孙晨光徐长坡陈澄武卫梁效峰黄志焕杨玉聪李丽娟朱建佶
Owner TIANJIN HUANXIN TECH DEV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products