Methods to Reduce Bank Conflicts

Abstract

The invention relates to a method for reducing storage bank conflicts, which comprises determining the binary addresses of multiple data that may cause storage bank conflicts when a memory containing N storage banks is accessed in parallel; determining a shift step size, the shift step size Represent the number of memory banks that the data in the memory bank is moved, and is the value represented by n bits selected from the binary address of the data in the memory, where N=2^n; and, the data in the memory is shifted by a step size After the move, the data with memory bank conflict will no longer be located in the same memory bank; and the data in the memory is moved according to the shift step, wherein the row address value of the data in the memory in the memory bank remains unchanged. The invention prevents data that may conflict during access from being located in the same memory bank, reduces memory bank conflicts, and improves memory performance.

Description

technical field [0001] The invention relates to a method for reducing memory bank conflicts, which belongs to the technical field of memory. Background technique [0002] Recently, some processors have been designed to access memories in parallel as demands on processors' ability to process data have increased. When the memory has multiple memory banks (Bank), the processor can simultaneously access the multiple memory banks in parallel without conflicts. [0003] However, in some cases, the processor may need to access data stored in the same memory bank in parallel. Under normal circumstances, the address of the data in the memory is fixed, and a bank conflict will occur at this time. That is, these data located in the same bank must be accessed one by one. For example, in image 3 In the memory example shown, each column represents a memory bank, that is, there are eight memory banks of Bank 0,..., Bank 7 in the memory, if accessing data of multiple addresses in the sam...

AI Technical Summary

Problems solved by technology

[0003] However, in some cases, the processor may need to access data stored in the same memory bank in parallel. Under normal circumstances, the address of the data in the memory is fixed, and a bank conflict will occur at this time. That is, these data located in the same memory bank must be accessed one by one

For example, in image 3 In the memory example shown, each column represents a memory bank, that is, there are eight memory banks of Bank 0,..., Bank 7 in the memory, if accessing data of multiple addresses in the same memory bank, for example, in Bank 0 Middle click 0, 8, 16, 24, such as image 3 In the gray scale display, it must use multiple cycles to access Bank 0 one by one, resulting in reduced memory performance

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