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Method for improving photoetching mark on epitaxial layer

A technology of photolithographic marking and epitaxial layer, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., and can solve the problems of unqualified photolithographic marking 21, failure to meet process requirements, failure to achieve alignment, etc.

Inactive Publication Date: 2019-05-21
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Please refer to figure 2 After forming a thick epitaxial layer 20 of more than 25um on the substrate 10 through the EPI process, the photolithographic mark 21 corresponding to the substrate position of the thick epitaxial layer 20 is almost invisible, that is, the photolithographic mark on the thick epitaxial layer 20 The poor continuity of 21 leads to unqualified photolithography marks 21 on the thick epitaxial layer, and the process requirements for interlayer alignment with the previous layer cannot be met on the thick epitaxial layer 20 after the EPI process
Please refer to figure 2 and image 3 , the reason is: in the EPI process, the thickness of the epitaxially grown thick film layer 21 is too thick, resulting in the depth and area of ​​the lithographic mark 21 corresponding to the substrate position on the thick epitaxial layer 20 being covered by the thick epitaxial layer material, As a result, the lithography mark 21 has a reduced structure such as uneven pits, or even the risk of being filled up, so that the lithography mark on the epitaxial layer cannot be recognized in the subsequent process, so the alignment cannot be achieved in the subsequent alignment process

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  • Method for improving photoetching mark on epitaxial layer
  • Method for improving photoetching mark on epitaxial layer
  • Method for improving photoetching mark on epitaxial layer

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Embodiment Construction

[0021] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims.

[0022] An embodiment of the present invention provides a method for improving photolithographic marks on an epitaxial layer. The thick epitaxial layer is divided into multiple thin epitaxial layers for epitaxial growth. The thickness of the layer is related, based on the improved photolithographic marks formed on the thin epitaxial layer by photolithography and etching, the next thin epitaxial layer is epitaxially grown to improve The lithographic marks formed on the thick epitaxial layer meet the requirements of the interlayer alignment process.

[0023] In the method for improving the lithographic mark on the epitaxial layer provided by the embodiment of the present invention, after correlating the etching depth of the litho...

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Abstract

The invention provides a method for improving a photoetching mark on an epitaxial layer. A thick epitaxial layer is divided into a plurality of thin epitaxial layers for epitaxial growth, the etchingdepth of the photoetching mark of the upper layer is associated with the thickness of the next thin epitaxial layer, on the basis of an improved photoetching mark obtained by photoetching and etchingthe photoetching mark of a reduced structure formed on the upper thin epitaxial layer, and the epitaxial growth is performed on the next thin epitaxial layer to improve the photoetching mark formed onthe thick epitaxial layer so as to meet the process requirements of interlayer alignment. By adoption of the method provided by the invention, the photoetching mark formed on the thick epitaxial layer can meet the process requirements of interlayer alignment.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for improving photoetching marks on an epitaxial layer. Background technique [0002] At present, in the manufacturing process of high-voltage and ultra-high-voltage semiconductor devices, the epitaxial growth (English abbreviation: EPI) process is a relatively important process step. However, in the EPI process with a thickness greater than 25um, there is often a problem. Please refer to figure 1 , the photolithographic marks 11 formed on the substrate 10 before the EPI process are clearly visible. Please refer to figure 2 After forming a thick epitaxial layer 20 of more than 25um on the substrate 10 through the EPI process, the photolithographic mark 21 corresponding to the substrate position of the thick epitaxial layer 20 is almost invisible, that is, the photolithographic mark on the thick epitaxial layer 20 Poor continuity of 21 leads to un...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/027
Inventor 李伟峰
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP