Unlock instant, AI-driven research and patent intelligence for your innovation.

Test nest for chip test, test jig and method

A technology of chip testing and testing fixtures, applied in the direction of electronic circuit testing, etc., can solve the problems of increasing workload, reducing nesting life, affecting production capacity, etc., to achieve the effect of preventing static electricity and improving service life

Inactive Publication Date: 2019-06-14
HUANWEI ELECTRONICS SHANGHAI CO LTD
View PDF7 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This technology helps create an improved testing environment for electronic devices with probes attached thereto. By adding two layers between the top layer and bottom layer of the device's housing or case, it prevents any electrical charge on both components during use without affecting their performance. Additionally, this design improves overall durability over existing designs while still maintaining good signal quality.

Problems solved by technology

This technical problem addressed in this patents relates to improving the durability or lifespan of chips used for testing during manufacturing processes due to their potential damage caused when they are dropped onto them while still being able to perform various tests without losing any coatings that could protect against electrostatics.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Test nest for chip test, test jig and method
  • Test nest for chip test, test jig and method
  • Test nest for chip test, test jig and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0071]The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0072] "First", "second" and similar words used in this application do not indicate any order, quantity or importance, but are only used to distinguish different components. "Comprising" or "comprising" and similar words mean that the elements or items appearing before the word include the elements or items listed after the word and their equivalents, without excluding other elements or items. Words such as "connected" or "connected" are not limit...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Diameteraaaaaaaaaa
Diameteraaaaaaaaaa
Login to View More

Abstract

The invention discloses a test nest for chip test, a test jig and a method. The test nest comprises a nest upper plate, and a nest lower plate; a chip slot for holding a tested chip is arranged on anupper surface of the nest upper plate, a bulge part is arranged on a lower surface of the nest upper plate, and the surface impedance of the nest upper plate is 1*10(7) omega to 9.9*10(8) omega; a sunken part is arranged on the upper surface of the nest lower plate, the bulge part is embedded into the sunken part, and the surface impedance of the nest lower plate is not less than 1*10(12) omega; multiple probe through holes penetrating through the nest upper plate and the nest lower plate are distributed in the chip slot. A double-deck test nest is formed through the nest upper plate and the nest lower plate; the electrostatic can be effectively prevented through the nest upper plate, and the nest lower plate can play an insulation effect on the probes; the service life of the whole test nest can be improved through the nest lower plate; the nest upper plate does not contact with the test probes, thereby preventing the short-circuiting between the test probes caused by the nest upper plate.

Description

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Owner HUANWEI ELECTRONICS SHANGHAI CO LTD