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Tensor Operations and Acceleration

A technology of tensor and arithmetic operations, applied in the field of circuits and devices that provide tensor operations, can solve the problem of not being able to provide data processing circuits fast enough

Active Publication Date: 2020-08-25
XILINX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, data may not be provided fast enough to fully utilize the processing circuitry

Method used

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  • Tensor Operations and Acceleration
  • Tensor Operations and Acceleration
  • Tensor Operations and Acceleration

Examples

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Embodiment Construction

[0035] In the following description, numerous specific details are set forth in order to describe specific examples presented herein. It will be apparent, however, to those skilled in the art that one or more other examples and / or variations of these examples may be practiced without all of the specific details presented below. In other instances, well-known features have not been described in detail in order not to obscure the description of the examples herein. For ease of illustration, the same reference numerals may be used in different drawings to refer to the same element or additional instances of the same element.

[0036] Various implementations involve a circuit designed to provide tensor operations at high throughput. The circuitry may include an array of processing elements, each processing element performing a portion of a larger matrix operation. Certain aspects of the present disclosure allow a processing element to operate at a frequency that exceeds the thro...

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Abstract

A system includes a global memory circuit (102, 104) configured to store input tensors and output tensors. The row data paths (106, 108) are both connected to the output ports of the memory circuit. The column data paths (124, 126) are connected to the input ports of the memory circuits. Processing elements (112, 114, 116, 118) are arranged in rows and columns along row data paths (106, 108) and column data paths (124, 126), respectively. The processing elements (112, 114, 116, 118) include a local memory circuit (122) configured to store a plurality of masks; and a processing circuit (120). Processing circuitry (120) is configured to receive portions of input tensors from row data paths (106, 108); receive masks from local memory circuitry (122); A mask is retrieved, multiple tensor operations are performed on the same received portion of the input tensor; and the results of the multiple tensor operations are used to generate the outputs of the corresponding column data paths (124, 126).

Description

technical field [0001] The present disclosure relates generally to circuits and devices providing tensor operations, and more particularly to circuits for use with data correlation and convolution kernels. Background technique [0002] Processing circuits use matrices or (more broadly) tensors to provide solutions to many different problems. For example, image processing sometimes uses convolution matrices. Different types of processing circuits can be used for this processing. [0003] There are many different circuits in which convolution matrices can be used, including but not limited to digital signal processors (DSPs), general-purpose computer processors, programmable integrated circuits, programmable logic devices (PLDs), and system-on-chip (SoC) devices . A PLD is a programmable integrated circuit (IC) that can be programmed to perform specified logic functions. A PLD (Field Programmable Gate Array (FPGA)) may include an array of programmable tiles. These program...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/04G06K9/46G06V10/764
CPCG11C7/1006G06N3/063G06N3/08G11C7/10G06F17/153G06V10/955G06V10/454G06V10/82G06V10/764G06N3/045G06N3/04G06F18/2414
Inventor E·C·吴I·赵张晓倩
Owner XILINX INC