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An assembly process method based on fine pitch qfn device and ceramic encapsulated qfp device

An assembly process and fine-pitch technology, which is applied to the assembly of printed circuits, electrical components, and printed circuits with electrical components, can solve problems such as low pass rate, fatigue fracture, and affecting device welding quality, and achieve the effect of improving production efficiency

Active Publication Date: 2020-06-09
SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Currently, digital and radio frequency printed board assemblies (PCBA) often use fine-pitch QFN packages and pottery-encapsulated QFP package devices in high-density layouts, and the two devices are reflowed together with other surface-mount devices on the board. Welding; and due to their respective characteristics, there are certain differences in the requirements for assembly, resulting in improper handling, which will not fully meet the problem of one-time qualification after welding.
[0003] Fine-pitch QFN devices have the characteristics of small size, invisible pads on the abdomen, and easy oxidation of the pins. Generally, the traditional reflow soldering process can be used to achieve soldering. Improper handling of operation rules such as soldering curves and inspection requirements will affect the soldering quality of the device, resulting in problems such as poor contact of the pins with the pad, tin oxidation on the pins, high voiding rate of the solder joints, short circuit of the pins, and poor quality of the solder joints. Inspection and other defects, resulting in low pass rate
[0004] Due to the large difference between the thermal expansion coefficient CTE of ceramic QFP devices and FR4, which is commonly used in printed boards, stress is prone to accumulate at the solder joints during the temperature cycle, causing fatigue fractures; gold-plated pins also need Carry out gold tinning treatment, tinning operation can choose manual tinning or tin pot tinning according to the situation, but manual tinning will cause pin coplanarity problems; at the same time, affected by the size of the layout space, soldering on the printed board When the pad package size is not much different from the lead size, there is also a certain degree of impact on solder joint inspection and long-term reliability

Method used

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Effect test

Embodiment Construction

[0020] The method of this embodiment can be used to achieve its effect in the soldering assembly process of printed board assemblies containing fine-pitch QFN devices and ceramic-sealed QFP devices. The present invention will be described in further detail below in conjunction with an assembly example of a digital printed board assembly (including fine-pitch QFN devices and pottery-encapsulated QFP devices), but the embodiments of the present invention are not limited thereto.

[0021] (1) pad design. According to the device size design, the pin width of the fine-pitch QFN device pad should be 0~0.05mm larger than the real one, and the length should be 0.5~1mm larger than the real one around the device, and the size difference of the abdominal pad is ±0.05mm; ceramic seal QFP The device pad is 0.2~0.4mm larger than the device pin size in the width direction, and at least 0.5mm is reserved at the root and toe in the length direction;

[0022] (2) Pre-treatment: Check that the ...

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Abstract

The invention relates to the field of SMT assembly processes, and discloses an assembly process method based on a fine-pitch QFN device and a ceramic-sealed QFP device. The method comprises the following steps: pad design: setting the size of a fine-pitch QFN device pin to be larger than that of a real object, enabling the size of a ceramic-sealed QFP device printed board pad to be larger than that of the device pin in the width direction, and leaving redundant space at the root and the toe in the length direction; pretreatment of the device: dipping the abdomen part of the fine-pitch QFN device and a pin bonding pad with a soldering flux, carrying out device pin bending forming on the ceramic-sealed QFP device to realize stress release, and carrying out gold removal and tinning on the ceramic-sealed QFP device by using a tin pan; silk-screen printing: setting the size of an opening of the fine-pitch QFN device to be equal to or larger than that of a pin, and enabling the size of an opening in the abdomen to be contracted and the shape of the opening to present a 4-grid pattern or a 9-grid pattern; reflow soldering: using a vacuum welding furnace, and adopting a step vacuumizing mode in the welding process; and inspection and detection: carrying out void ratio detection and tin-climbing wetting state detection, and assembling to obtain the printed board assembly with high one-time welding qualification rate.

Description

technical field [0001] The invention relates to the technical field of SMT assembly technology, in particular to an assembly technology method based on fine-pitch QFN devices and ceramic-sealed QFP devices. Background technique [0002] Currently, digital and radio frequency printed board assemblies (PCBA) often use fine-pitch QFN packages and pottery-encapsulated QFP package devices in high-density layouts, and the two devices are reflowed together with other surface-mount devices on the board. Welding; and due to their respective characteristics, there are certain differences in the requirements for assembly, resulting in improper handling, which will not fully meet the problem of one-time qualification after welding. [0003] Fine-pitch QFN devices have the characteristics of small size, invisible pads on the abdomen, and easy oxidation of the pins. Generally, the traditional reflow soldering process can be used to achieve soldering. Improper handling of operation rules ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/34
CPCH05K3/3494H05K2203/043H05K2203/163
Inventor 李杨王慧琼陈春何冬梅
Owner SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP