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Solid-state memory device random access performance improving method based on STT-MRAM

A solid-state memory, random access technology, applied in the input/output process of memory systems, instruments, data processing, etc., can solve the problem of consuming the life of NAND flash, reduce the response time, enhance the random access performance, and simplify the response path.

Active Publication Date: 2019-09-24
CETHIK GRP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The longest path needs to directly download the data, and then modify the multi-level LBA mapping table. When the same LBA is written multiple times, the same LBA will be written multiple times, and the LBA mapping table will be changed multiple times. This process not only It takes more than tProg time to respond, and it also consumes too much NAND flash life

Method used

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Embodiment Construction

[0033] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some, not all, embodiments of the application. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein in the description of the application are only for the purpose of describing specific embodiments, and are not intended to limit the application.

[0035] Such as figure 1 As shown, in one embodiment, a method for improving the random access performance of a solid-state...

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Abstract

The invention discloses a solid-state memory device random access performance improving method based on STT-MRAM. The solid-state storage device comprises a magnetic random access memory STT-MRAM and a storage medium NAND flash. The high-speed read-write performance and the power-down nonvolatile performance of the STT-MRAM are utilized. The STT-MRAM is adopted as the high-hit LBA data cache in the solid-state storage device controller, the response path of the high-hit LBA is simplified, and the random access performance of the system is enhanced. And when GC occurs, the high-hit LBA data is uniformly put into the target BLOCK by utilizing the LBA read-write frequency data in the STT-MRAM, so that the high-hit LBA data can be read into the STT-MRAM for buffering at one time when the data in the buffer area of the STT-MRAM is lost or damaged, and the response time is shortened.

Description

technical field [0001] The application belongs to the technical field of computer storage devices, and in particular relates to a method for improving random access performance of a solid-state storage device based on STT-MRAM. Background technique [0002] There are currently two main types of computer external storage, magnetic disk (HDD) and solid-state drive (SSD). The main storage medium in SSD is flash memory (FLASH MEMORY). Compared with HDD, SSD has faster read and write speed, better random access performance, and lower power consumption for reading and writing. Therefore, with the improvement of FLASH MEMORY manufacturing process and the reduction of cost , SSD has been more and more widely used. [0003] The storage medium FLASH in the current commercial SSD mainly has two structures: NOR and NAND. Compared with NOR FLASH, NAND FLASH has higher storage density and lower cost, and is currently the mainstream storage medium of SSD. However, whether it is NAND FLA...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F12/0802
CPCG06F3/0611G06F3/0679G06F12/0802Y02D10/00
Inventor 蔡晓晰丁钢波杨杰
Owner CETHIK GRP
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