Clock synchronization test method and device
A clock synchronization and test method technology, applied in electrical testing/monitoring, testing/monitoring control systems, instruments, etc., can solve problems such as misjudgment, insufficient accuracy, and inconvenient analysis
Active Publication Date: 2020-01-10
ZHEJIANG SUPCON TECH
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Problems solved by technology
[0002] In the control system, many functions are closely related to time, such as trends, process alarms, log records, sequence of events (SOE), etc. It is very important that the upper computer and the lower computer in the control system always maintain a unified clock. When an abnormality occurs, it is necessary to call the data of the upper computer and the lower computer in the control system for analysis and comparison and find out the cause of the abnormality. If the clocks are not synchronized, it will cause great inconvenience to the analysis, and may even cause misjudgment
[0003] In the prior art, checking the time display of the upper computer and the lower computer with the naked eye is not accurate enough, only accurate to the second level, and cannot be used as an effective measurement method. Therefore, it is urgent to provide a clock synchronization test method
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[0048] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
[0049] The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined in this document can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited t...
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The invention discloses a clock synchronization test method and device. The method comprises the steps of: when a test signal is detected, simultaneously acquiring a first time of receiving a signal to be tested in an upper computer of a system to be tested, and acquiring a second time of receiving the test signal in a lower computer; compensating the first time to obtain a first target time; andif a time difference between the first target time and the second time is less than a preset time difference threshold, judging that the system to be tested meets clock synchronization requirements. In the above test method, the first time of receiving the signal to be tested in the upper computer of the system to be tested and the second time of receiving the test signal in the lower computer areacquired at the same time, the first time is compensated to obtain the first target time, and if the time difference between the first target time and the second time is less than the preset time difference threshold, it is judged that the system to be tested meets the clock synchronization requirements, so that a clock synchronization test is realized.
Description
Technical field [0001] The present invention relates to the technical field of automatic control, in particular to a test method and device for clock synchronization. Background technique [0002] In the control system, many functions are closely related to time, such as trends, process alarms, log records, sequence of events (SOE), etc. It is very important that the upper computer and the lower computer in the control system always maintain a unified clock. When an abnormality occurs, it is necessary to retrieve the data of the upper computer and the lower computer in the control system to analyze and compare and find the cause of the abnormality. If the clock is not synchronized, it will cause great inconvenience to the analysis and may even cause judgment errors. [0003] In the prior art, the accuracy of checking the time display of the upper computer and the lower computer by naked eyes is not accurate enough. It is only accurate to the second level and cannot be used as an ef...
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IPC IPC(8): G05B23/02
CPCG05B23/0213G05B2219/24065
Inventor 谷双平李波波郑志方沈孟龙
Owner ZHEJIANG SUPCON TECH