A clock synchronization test method and device
A technology of clock synchronization and testing method, which is applied in the direction of electrical testing/monitoring, testing/monitoring control system, program control, etc. It can solve the problems of not being an effective measurement method, misjudgment, and inconvenient analysis, etc., and achieve the realization of clock synchronization testing. Effect
Active Publication Date: 2021-08-17
ZHEJIANG SUPCON TECH
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Problems solved by technology
[0002] In the control system, many functions are closely related to time, such as trends, process alarms, log records, sequence of events (SOE), etc. It is very important that the upper computer and the lower computer in the control system always maintain a unified clock. When an abnormality occurs, it is necessary to call the data of the upper computer and the lower computer in the control system for analysis and comparison and find out the cause of the abnormality. If the clocks are not synchronized, it will cause great inconvenience to the analysis, and may even cause misjudgment
[0003] In the prior art, checking the time display of the upper computer and the lower computer with the naked eye is not accurate enough, only accurate to the second level, and cannot be used as an effective measurement method. Therefore, it is urgent to provide a clock synchronization test method
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[0048] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0049] The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein...
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The invention discloses a clock synchronization test method and device. The method comprises: when a test signal is detected, at the same time acquire the first time when the upper computer of the system to be tested receives the signal to be tested and acquire the time at which the lower computer receives the signal. The second time of the test signal; the first time is compensated to obtain the first target time; the time difference between the first target time and the second time is less than the preset time difference threshold, and the to-be-tested time is determined The system meets the clock synchronization requirements. In the above-mentioned test method, obtain the first time of receiving the signal to be tested in the upper computer of the system under test and the second time of receiving the test signal in the lower computer at the same time; and compensate the first time to obtain The first target time, when the time difference between the first target time and the second time is less than a preset time difference threshold, it is determined that the system under test meets the clock synchronization requirement, and the clock synchronization test is realized.
Description
technical field [0001] The invention relates to the technical field of automation control, in particular to a clock synchronization testing method and device. Background technique [0002] In the control system, many functions are closely related to time, such as trends, process alarms, log records, sequence of events (SOE), etc. It is very important that the upper computer and the lower computer in the control system always maintain a unified clock. When an abnormality occurs, it is necessary to retrieve the data of the upper computer and the lower computer in the control system for analysis and comparison and find out the cause of the abnormality. If the clocks are not synchronized, it will cause great inconvenience to the analysis, and may even cause misjudgment. [0003] In the prior art, checking the time display of the upper computer and the lower computer with the naked eye is not accurate enough, only accurate to the second level, and cannot be used as an effective m...
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IPC IPC(8): G05B23/02
CPCG05B23/0213G05B2219/24065
Inventor 谷双平李波波郑志方沈孟龙
Owner ZHEJIANG SUPCON TECH