A high-level synthesis method and system for graph-oriented computing

Abstract

The invention discloses a high-level comprehensive method and system for graph computing, belonging to the field of big data processing, including: (1) generating a graph computing program according to a point-centered functional programming model; (2) adding optimization instructions Specify architecture parameters and microarchitecture parameters; (3) Compile the graph calculation program into a modular data flow intermediate representation according to the data flow graph and optimization instructions; (4) According to the mapping relationship between the IR module and the hardware template, convert the data flow intermediate Indicates that it is mapped to the underlying architecture, and instantiates the pipeline and buffer in the hardware template; (5) if each instantiated parameterized hardware template and the overall architecture meet the constraints, then go to step (6); otherwise, modify and optimize Go to step (3) after the instruction; (6) generate synthesizable hardware language code. The invention can provide effective support for generating graph application RTL from an upper layer language, so as to improve the parallelism of graph calculation executed on FPGA.

Description

technical field [0001] The invention belongs to the field of big data processing, and more specifically relates to a high-level comprehensive method and system for graph-oriented computing. Background technique [0002] In the past ten years, with the emergence of big data analysis problems such as biological information networks, social networks, and web page graphs, graph applications have become more and more important. Graphs are the best way to express the associated attributes of big data, and graph computing is based on graph models. For the mining and analysis process of huge, sparse, and hyperdimensional associations, the current machine learning and deep learning of big data rely on graph computing, and graph computing has become one of the mainstream modes of big data processing. [0003] Graph computing is complex and irregular, which poses new challenges to current hardware. For a general-purpose central processing unit (Central Processing Unit, CPU), even for ...

AI Technical Summary

Problems solved by technology

The HLS system can convert programs written in high-level languages ​​(mostly in C / C++) into register-transfer level (Register-Transfer Level, RTL) codes (such as Verilog, VHDL, etc.), and the HLS system also provides various optimization methods to make Developers can optimize the hardware structure from the high-level language level, and some of them also provide a visual view to facilitate the analysis of the circuit behavior of each clock cycle, which further improves the performance of generating RTL. There is a large gap in many aspects such as graph computing and performance. This phenomenon is especially serious for irregular and complex associated applications such as graph computing.

In general, the existing HLS system cannot provide effective support for the high-parallel execution of graph computing on FPGA

Images