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A method to realize time synchronization of systemc hardware-in-the-loop simulation

A semi-physical simulation and time synchronization technology, applied in design optimization/simulation, software simulation/interpretation/simulation, CAD circuit design, etc., can solve the problem of difficulty in unifying software simulation speed, and achieve the effect of meeting basic needs

Active Publication Date: 2021-06-15
SHENZHEN ACAD OF AEROSPACE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the current problem is that in different simulation environments and under different computer performances, it is difficult to unify the simulation speed of the software.

Method used

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  • A method to realize time synchronization of systemc hardware-in-the-loop simulation
  • A method to realize time synchronization of systemc hardware-in-the-loop simulation
  • A method to realize time synchronization of systemc hardware-in-the-loop simulation

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Embodiment Construction

[0018] like image 3 As shown, the present invention discloses a method for realizing SystemC hardware-in-the-loop simulation time synchronization, comprising the following steps:

[0019] Step 1: Our commonly used digital circuits all need a clock oscillation source. The method of the present invention is to do special processing on the clock oscillation source part, make a clock source generator, and connect the clock source between the PC and the actual hardware to generate The clock source generator can generate a corresponding clock source according to a specified value, and the clock source is used as a clock input source of the actual hardware in the hardware-in-the-loop simulation;

[0020] Step 2: Write a clock synchronization module in the SystemC program of the PC. On the one hand, the clock synchronization module generates a clock output to drive the actual hardware, and on the other hand, communicates with the PC through the clock synchronization protocol through ...

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Abstract

The invention provides a method for realizing the time synchronization of SystemC hardware-in-the-loop simulation, comprising the following steps: Step 1: connecting a clock source generator between a PC and actual hardware, and the clock source generator can generate according to a specified value Corresponding clock source, described clock source is as the clock input source of the actual hardware in the hardware-in-the-loop simulation; Step 2: in the program of SystemC of PC, write a clock synchronization module, this clock synchronization module produces clock output on the one hand The actual hardware is driven, and on the other hand, the clock synchronization protocol is communicated with the PC through the USB bus to synchronize the operation of the SystemC program. The beneficial effects of the present invention are: the method for realizing the time synchronization of the SystemC hardware-in-the-loop simulation ensures the synchronization of the logic clock of the software and the time sequence of the actual hardware, and meets the basic requirements of software-hardware collaborative simulation development.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for realizing time synchronization of SystemC hardware-in-the-loop simulation. Background technique [0002] Due to the vigorous expansion of the modern semiconductor industry, the scale of semiconductor integration has become increasingly complex and large; for example, the latest Intel cpu integrates more than 1,000,000 semiconductor devices; with the current prosperous industry, the speed of semiconductor development and verification testing It is crucial to the development of semiconductor companies. Therefore, the basic mode in the current semiconductor development is to simulate and verify while developing. Among them, SystemC is a development and testing framework that can support the whole life cycle. From the early digital circuit logic verification to the later architecture analysis, algorithm analysis, and upper-layer application software such as the transplanta...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/12G06F9/455G06F30/20G06F117/08
CPCG06F1/12G06F9/45504
Inventor 陶永超郑宏运吴翔虎
Owner SHENZHEN ACAD OF AEROSPACE TECH