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Full duplex bus and train

A full-duplex, bus technology, applied in the bus field, can solve the problems of high cost and high IO consumption, achieve the effect of reducing wiring length requirements, reducing IO consumption, and simplifying data recovery logic

Active Publication Date: 2020-12-18
CSR ZHUZHOU ELECTRIC LOCOMOTIVE RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the current backplane bus, point-to-point high-speed serial signal forms, such as PECL, CML, LVDS, etc., are usually used for high-speed data transmission. However, these point-to-point high-speed serial signal forms consume a large number of IOs, and the cost is high. high

Method used

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Embodiment Construction

[0051] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0052] Embodiments of the present invention provide a full-duplex bus, see figure 1 , the full-duplex bus includes a master node, a slave node, a first differential pair circuit L1, a second differential pair circuit L2, and a third differential pair circuit L3. There is one master node and one or more slave nodes. The first differential pair circuit L1 is the physical channel for transmitting data signals from the master node to the slave node, the second di...

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Abstract

The invention provides a full duplex bus and a train, a master node and a slave node of the full duplex bus both comprise an M-LVDS driver and an M-LVDS receiver, and data signal transmission is carried out between the M-LVDS driver of the master node and the M-LVDS receiver of the slave node through a first differential pair circuit. Data signal transmission is carried out between the M-LVDS driver of the slave node and the M-LVDS receiver of the master node through a second differential pair circuit, and a full duplex data bus system based on M-LVDS is formed. Compared with other types of buses, the master node and the slave node need fewer signals, so that IO consumption is reduced, and the cost is further reduced. And the serial data effective signal and the serial data signal are matched for use, and the data receiver determines whether the serial data signal is sent or not by utilizing the serial data effective signal, so that the coding overhead defined by the boundary of the data frame is reduced, and the data recovery logic is simplified.

Description

technical field [0001] The invention relates to the field of bus technology, more specifically, to a full-duplex bus and a train. Background technique [0002] The bus is a public communication trunk line for transmitting information between various functional components of a computer, and it is a transmission harness composed of wires. In the current backplane bus, point-to-point high-speed serial signal forms, such as PECL, CML, LVDS, etc., are usually used for high-speed data transmission. However, these point-to-point high-speed serial signal forms consume a large number of IOs, and the cost is high. high. Contents of the invention [0003] In view of this, the present invention proposes a full-duplex bus and train to reduce costs. [0004] In order to achieve the above purpose, the proposed scheme is as follows: [0005] In the first aspect, a full-duplex bus is provided, including: a master node, a slave node, a first differential pair circuit, a second differenti...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42G06F13/40
CPCG06F13/4282G06F13/40
Inventor 梅文庆文宇良邱岳烽李程谭富民李泽泉杨胜李淼凡林斌段海波杨烁郭赞
Owner CSR ZHUZHOU ELECTRIC LOCOMOTIVE RES INST
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