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Full-duplex bus and train

A full-duplex, bus technology, applied in the bus field, can solve the problems of high cost and high IO consumption, and achieve the effect of reducing IO consumption, coding overhead and cost

Active Publication Date: 2022-05-27
CSR ZHUZHOU ELECTRIC LOCOMOTIVE RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the current backplane bus, point-to-point high-speed serial signal forms, such as PECL, CML, LVDS, etc., are usually used for high-speed data transmission. However, these point-to-point high-speed serial signal forms consume a large number of IOs, and the cost is high. high

Method used

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  • Full-duplex bus and train
  • Full-duplex bus and train
  • Full-duplex bus and train

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Embodiment Construction

[0051] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0052] Embodiments of the present invention provide a full-duplex bus, see figure 1 , the full-duplex bus includes a master node, a slave node, a first differential pair circuit L1, a second differential pair circuit L2, and a third differential pair circuit L3. The master node is one, and the slave node can be one or more. The first differential pair circuit L1 is a physical channel for transmitting data signals from the master node...

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Abstract

The invention provides a full-duplex bus and a train, the master node and the slave node of the full-duplex bus all include an M-LVDS driver and an M-LVDS receiver, and the M-LVDS driver of the master node and the M-LVDS driver of the slave node ‑LVDS receivers perform data signal transmission through the first differential pair circuit, and data signal transmission is performed between the M‑LVDS driver of the slave node and the M‑LVDS receiver of the master node through the second differential pair circuit, forming a set of Full-duplex data bus system based on M‑LVDS. Compared with other types of buses, both master and slave nodes require fewer signals, which reduces IO consumption and thus reduces costs. And the serial data valid signal is used in conjunction with the serial data signal, and the data receiver uses the serial data valid signal to determine whether there is a serial data signal to send, thereby reducing the coding overhead of data frame boundary definition and simplifying the data recovery logic .

Description

technical field [0001] The present invention relates to the field of bus technology, and more particularly, to a full-duplex bus and a train. Background technique [0002] The bus is a common communication trunk line that transmits information between various functional components of a computer, and it is a transmission harness composed of wires. In the current backplane bus, point-to-point high-speed serial signal forms, such as PECL, CML, LVDS, etc., are usually used for high-speed data transmission. However, these point-to-point high-speed serial signal forms need to consume a lot of IO, and the cost is relatively high. high. SUMMARY OF THE INVENTION [0003] In view of this, the present invention proposes a full-duplex bus and train to achieve the purpose of reducing costs. [0004] In order to achieve the above purpose, the proposed scheme is as follows: [0005] A first aspect provides a full-duplex bus, comprising: a master node, a slave node, a first differentia...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42G06F13/40
CPCG06F13/4282G06F13/40
Inventor 梅文庆文宇良邱岳烽李程谭富民李泽泉杨胜李淼凡林斌段海波杨烁郭赞
Owner CSR ZHUZHOU ELECTRIC LOCOMOTIVE RES INST
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