A method for dynamically changing layout, electronic device, and computer-readable storage medium

Abstract

A method for dynamically changing the layout, comprising the following steps: creating standard cell pin access and corresponding rectangles; sorting the standard cells, finding out the pin access rectangles of each standard cell, performing design rule checks, and obtaining violations The status of the design rules; build a directed weighted graph based on the status of the violation of the design rules, flip the standard cells and complete the pin routing of the standard cells. The method for dynamically changing the layout, the electronic equipment and the computer-readable storage medium of the present invention can repair the problematic standard unit layout in the early stage, so that the pins of the standard unit can be connected by wiring smoothly, and the design process is accelerated.

Description

technical field [0001] The invention relates to the technical field of VLSI physical design, in particular to layout and wiring in the VLSI physical design process. Background technique [0002] With the advancement of ultra-large-scale integrated circuits to deep submicron and nanometers, the scale of integrated circuits is getting larger and larger, and the system is becoming larger and more complex, which also brings many new problems to Electronic Design Automation (EDA) tools , especially brings more challenges to the layout and routing link. Layout and routing are two important links in the physical design of integrated circuits, and they are also a general method to solve the realization problems of modern complex physical design. Layout is to determine the position and direction of standard cells in the design layout, and to give the constraints and optimization goals of the solution. Some standard cells may have fixed positions while others are immutable. The lay...

AI Technical Summary

Problems solved by technology

However, detailed design rules cannot be considered in the layout, and it may still happen that the standard cells placed in the same row are too close together, and the router cannot perform signal connections to the pins (Pins) in two adjacent standard cells, or, The placement of the given standard unit is not optimized for the minimum line length placement

Adding checks of detailed design rules to the layout is an unrealistic problem

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