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Structure and method for realizing self-adaption of processor to SATA and NVME M.2, and medium

A processor and self-adaptive technology, applied in the direction of electrical digital data processing, digital data processing components, instruments, etc., can solve the problem of not being able to satisfy the user's rapid response to the host, not being able to meet the user's flexible configuration, and reducing the operating speed of NVMEM.2, etc. question

Inactive Publication Date: 2021-03-02
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Existing technologies often design connection boards for SATA and NVME separately, which cannot meet the needs of users for flexible configuration, and once the user makes a wrong disk, it is easy to cause problems on the motherboard due to incompatibility
Generally, the M.2 of NVME is mostly the physical channel of PCIE X2, and the existing processors often use X1 when connecting to NVME, which greatly reduces the running speed of NVME M.2 and cannot meet the user's requirements for fast response to the host. need

Method used

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  • Structure and method for realizing self-adaption of processor to SATA and NVME M.2, and medium
  • Structure and method for realizing self-adaption of processor to SATA and NVME M.2, and medium
  • Structure and method for realizing self-adaption of processor to SATA and NVME M.2, and medium

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Embodiment 1

[0036] refer to figure 1 As shown, the present invention provides a structure for realizing processor adaptive SATA and NVME M.2, including processor 1, wherein,

[0037] The processor 1 is connected to the PCIE to SATA bridge 2 through the first PCIE channel, and the PCIE to the SATA bridge 2 is connected to the first port of the channel selection unit 3 through the SATA bus, and the processor 1 is passed to the second PCIE channel of X2 and The third PCIE channel of X2 is connected to the second port of the channel selection unit, and the third port of the channel selection unit 3 is selected to be connected to the first port or the second port;

[0038] The third port of the channel selection unit 3 is electrically connected to the M.2 connector 4;

[0039] The PEDET key of the M.2 connector 4 is electrically connected to the SEL port of the channel selection unit 3 .

[0040] In the specific implementation process, a feasible model of the PCIE to SATA bridge 2 is ASM1061...

Embodiment 2

[0045] combined reference image 3 and Figure 4 As shown, the difference from the embodiment 1 is that the channel selection unit in the embodiment is used as the channel selection logic module in the embodiment 2, and the channel selection unit 3 in the embodiment 2 adds a configuration control module, and the control The module is electrically connected to the channel selection logic module, and the control module is electrically connected to the power supply unit 6 . In the specific implementation process, the signal of the SEL port is acquired by the control module, and the control module provides a high level or low level signal to the channel selection logic module according to the signal of the SEL port to control the Channel selection logic module.

[0046] In the specific implementation process, the control module generates a control signal according to the signal of the SEL port, and the control module sends the control signal to the power supply unit 6, and the p...

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Abstract

The invention discloses a structure for realizing self-adaption of a processor to SATA (Serial Advanced Technology Attachment) and NVME (Non-Volatile Memory Express) M.2, which comprises the processor, the processor is connected with a PCIE (Peripheral Component Interconnect Express)-to-SATA bridge through a first PCIE channel, and the PCIE-to-SATA bridge is connected with a first port of a channel selection unit via a SATA bus, the processor is connected with the second port of the channel selection unit via the second PCIE channel and the third PCIE channel of X2; a third port of the channelselection unit is selectively connected with the first port or the second port; a third port of the channel selection unit is electrically connected with an M.2 connector; and the PEDET key of the M.2 connector is electrically connected with the SEL port of the channel selection unit. According to the invention, the processor which does not support the SATA is connected with the SATA M.2 hard disk through the PCIE-to-SATA bridge; and the channel selection unit is used for realizing channel selection according to different signals sent by the SATA M.2 hard disk and the NVME M.2 hard disk so asto realize the self-adaption of the SATA M.2 hard disk and the NVME M.2 hard disk, so that the hard disk configuration is more flexible, and the loss caused by disk error is avoided.

Description

technical field [0001] The invention relates to the technical field of connection between a processor and a hard disk, in particular to a structure, a method and a medium for realizing processor adaptive SATA and NVMEM.2. Background technique [0002] With the increasingly fierce competition between China and the United States, in order to reduce or even get rid of domestic dependence on American company chips, the country is now paying more and more attention to the development of domestic chips. In terms of processors, some domestic processors have reached the industry-leading level and are widely used. in various fields. [0003] The existing actual situation is that some domestic chips do not integrate SATA controllers compared with some foreign chips, and are converted through the chip's own PCIE resources when connecting to hard drives and other devices. Moreover, most of the M.2 of NVME on the market currently use the physical channel of PCIE X2, and the M.2 of SATA ...

Claims

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Application Information

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IPC IPC(8): G06F13/38G06F13/40G06F1/3234
CPCG06F13/385G06F13/4022G06F1/3253G06F2213/0026G06F2213/0032
Inventor 王世鹏李岩
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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