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Thin film deposition equipment and wafer boat components

A thin-film deposition device and component technology, which is applied to electrical components, electrical solid-state devices, semiconductor devices, etc., can solve the problems of lower product yield, fluctuations in electrical performance of 3D memory devices, and differences in response speed, to simplify the structure and eliminate wafers. The effect of the effect of the loading effect

Active Publication Date: 2021-12-03
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, in a thin film deposition device, even though the flow rates of the reactive gases on multiple layers are approximately the same, multiple wafers on different layers will compete with each other for the reactive gases, resulting in differences in the reaction rates.
In the vertical direction of the wafer boat, there are differences in film thickness on different layers of the wafer, resulting in fluctuations in the electrical performance of 3D memory devices and a reduction in product yield.

Method used

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  • Thin film deposition equipment and wafer boat components
  • Thin film deposition equipment and wafer boat components
  • Thin film deposition equipment and wafer boat components

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Embodiment Construction

[0026] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0027] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. Also, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, or region.

[0028] If it is to describe the situation directly on another layer or anothe...

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Abstract

The application discloses a thin film deposition device and a crystal boat component. The wafer boat assembly includes: a plurality of diaphragms stacked; and a side wall connecting the plurality of diaphragms together, the side wall is connected to a part of the peripheral area of ​​each of the diaphragms, so that The adjacent transverse partitions and the side walls jointly form a semi-enclosed space, wherein the semi-enclosed space between adjacent transverse partitions is used to accommodate at least one wafer, and the side walls are formed with a plurality of The gas inlet ends respectively supply gas to the semi-enclosed spaces. The wafer boat assembly adopts an isolation structure near the inlet end to eliminate the influence of wafer loading effect, so as to improve the film thickness consistency of wafers at different levels.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a thin film deposition device and a crystal boat assembly. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. As the market demands more and more storage capacity of a single memory chip, there are as many as 16 or more layers of bare chips stacked in a stacked package structu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/673H01L21/67H01L27/11551H01L27/11578C23C16/455C23C16/458H10B41/20H10B43/20
CPCH01L21/67303H01L21/67011C23C16/45546H10B41/20H10B43/20
Inventor 程诗垚蒲浩刘松
Owner YANGTZE MEMORY TECH CO LTD